Ignore Renaming of x0 (#120)

Fix renaming to skip renaming of x0 outlined in
https://github.com/riscv-software-src/riscv-perf-model/issues/118

.

Changes:
- `renameInstructions_()` now checks if a source is x0, if it is and is
a data operand for a LSU operation, we still create a data register for
it, as we need to check in LSU for x0 before issuing instruction
- Added a boolean `x0` field to `Reg` struct in `RenameData` that tracks
if a data register is an `x0` instruction. This helps on reclamation of
rename credits in `getAckFromROB_()` to make sure we don't decrement for
an x0 data register
- Updated logic to handle for destination reclamation in
`getAckFromROB_()` to ensure when we reclaim credits/freelist
registers/references, we don't process them for x0 destinations
- Fixed initial allocation of freelist registers for `RF_INTEGER` to
only map registers for x1 - x31, before we were mapping from x0 - x31,
so we should technically see a performance improvement as we gained 1
extra freelist register from not renaming x0

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Signed-off-by: Aaron Chan <achn357@gmail.com>
Co-authored-by: Knute <56927209+klingaard@users.noreply.github.com>