README: use gnu-toolchain

Most of the complexity is in instruction address translation, since
instructions may span page boundaries.

This supports distinguishing the EPC (the address of the first byte of the
faulting instruction) from the address of the page fault (potentially some
bytes later).

rdcycle/rdinstret now have single-instruction granularity.  Questionable
behavior when timer interrupts occurred around the same time as the compare
register is written should be fixed.

This reverts commit fd18dc43.

Refactoring support for custom instructions.

specifically, unused variables in auto-generated code.

This manifested as a spurious compile warning when using make -j.

dummy-rocc-test build fix

Enable support for the four custom instructions

* Update generated encoding.h (generated from riscv-opcodes)
* Add empty implementations for the custom instructions

...and also save some space by not defining the register names in a header.

It is nonstandard, and GCC doesn't support it on 32-bit platforms. The
resulting code for MULH[[S]U] is crappier, but that doesn't really matter,
as these instructions are dynamically infrequent.

Update riscv.ac to set CPPFLAGS with fesvr include path

Need to set CPPFLAGS in riscv.ac in addition to configure

on os x, clang needs different flags than gcc to generate and use precompiled headers

Since we no longer are duplicating CFLAGS, ensure CPPFLAGS are set
correctly.

  - Spits out all PCs (on 4B granularity) executed with count.
  - Requires a compile time configuration option.
  - Also requires a run-time flag.

   - Previous behavior was to print the commit log only in user code.

This isn't required by the ISA but it matches existing HW.