Otherwise they will have the same problem as #1044

Use this for mstatus on RV32 so that `csrw mstatus` does not modify
the bits in `mstatush`. Fixes #1044.

Mask in underlying CSR is sufficient.

Mask field in rv32_high_csr_t is now unneeded and will be removed next.

Add support for smstateen 1.0.0

The privileged spec allows writes to pmp(i-1)cfg with locked pmp(i)cfg
(According to a recent discussion: https://github.com/riscv/riscv-isa-manual/issues/866)

Fix #1022 by removing need to mask insn_t bits

No longer needed, since they are no longer sign-extended.

Fixes #1022 by eliminating undefined behavior (64-bit instructions
resulted in a shift amount equal to the datatype width).

...since we no longer rely on their being sign-extended.

...since we no longer rely on their being sign-extended.

This was an artifact of an old P-extension draft that erroneously
allocated a reserved major opcode.  The newer draft uses a different
opcode, so this hack is no longer needed.

When WFI was changed to throw a C++ exception, the special-npc
signaling became obsolete.

clang with `-Wall` happened to catch this.

Now that logic only affects ebreak instructions, and does not affect
triggers that also cause a trap to be taken.

Fixes #725. Although like Paul, I don't have a test for this case.

Introduce trap_debug_mode so so ebreak instructions can force entry into
debug mode.

Include recently added headers in riscv/riscv.mk.in

Simplify decode_insn and insn_desc_t

Iterate over the instruction chains in reverse order, prioritizing
the last call to `disassembler_t::add_insn`.

To preserve behavior for the standard instructions, reverse the order
in which we add instructions in the `disassembler_t` constructor.

Supersedes #995.

We do not condition them on Zicbop/Zihintpause because,
definitionally, all implementations provide them.

Fixes bug introduced in 5b7cdbe1

The field is rendered unnecessary by 11f5942b.

Undoes some changes from 750f008e.

These add to the length of the instruction list without providing
an apparent benefit.

Fix for issue #990, implements the PBMTE bit in the henvcfg /menvcfg reisters