- Sep 30, 2022
-
-
YenHaoChen authored
The mcontrol trigger can select either address or data for checking. The The selection decides the priority of the trigger. For instance, the address trigger has a higher priority over the page fault, and the page fault has a higher priority over the data trigger. The previous implementation only has the checking functions for data trigger, which results in incorrect priority of address trigger. This commit adds a has_data argument to indicate address trigger and the priority of the trigger.
-
- Sep 28, 2022
-
-
Andrew Waterman authored
Fix build using Xcode 14
-
Andrew Waterman authored
Don't include .a files in other .a files. Doing so trips a sanity check in the Xcode 14 toolchain, because the included .a files are not themselves mach-o format, even though their contents are.
-
Andrew Waterman authored
Fix vmv.x.s for RV32
-
Andrew Waterman authored
The Spike internals require that, when XLEN is narrower than reg_t, values be sign-extended to the width of reg_t.
-
- Sep 24, 2022
-
-
Andrew Waterman authored
Build and install the lib and header dependencies required by Hammer
-
Andrew Waterman authored
Actually run a program in CI
-
Andrew Waterman authored
To avoid long CI times, keep the program in binary form. To avoid storing binary files in this repository, store the binaries as an asset on a github release.
-
Jerin Joy authored
https://github.com/rivosinc/hammer Signed-off-by:
Jerin Joy <joy@rivosinc.com>
-
Andrew Waterman authored
In CI, check that help message prints without error
-
Andrew Waterman authored
-
- Sep 23, 2022
-
-
Andrew Waterman authored
Run CI with -Werror
-
Andrew Waterman authored
-
Andrew Waterman authored
-
- Sep 21, 2022
-
-
Andrew Waterman authored
Detect loading isa-incompatible code
-
Andrew Waterman authored
add support for sscofpmf extension v0.5.2
-
- Sep 20, 2022
-
-
Iman Hosseini authored
detects the loading of isa-incompatible (i.e. 32 bit code to 64bit HART) code and emits an error message to help avoid unintentionally loading wrong elf.
-
- Sep 17, 2022
-
-
YenHaoChen authored
The trigger matching only checks on TLB hit (after refill_tlb()). However, instructions on plugin devices will never be filled into the TLB; thus, triggers cannot fire when executing instructions on the plugin devices. The PR removes the if-condition of TLB hit for trigger checking. Co-authored-by:Howard Yen-Hao Chen <yhchen@andestech.com>
-
- Sep 16, 2022
-
-
Scott Johnson authored
Initialize triggers using default member initializers
-
Scott Johnson authored
Instead of constructor member initializer lists, which require repeating the list of members, and cause ugly merge conflicts when the list of members changes.
-
- Sep 09, 2022
-
-
Scott Johnson authored
Remove obsolete enum trigger_operation_t
-
Andrew Waterman authored
Non-functional changes for RVV
-
Scott Johnson authored
Moved to triggers.h and renamed in a2a25874, but the old enum was mistakenly left behind.
-
- Sep 08, 2022
-
-
Weiwei Li authored
and VI_XI_LOOP_WITH_CARRY: require_vm is also included in VI_CHECK_SSS
-
Weiwei Li authored
require_vector_novtype
-
Weiwei Li authored
require_vector is also included in VI_GENERAL_LOOP_BASE
-
Andrew Waterman authored
vmv<nf>r.v depends on vtype, and therefore should check vill
-
- Sep 07, 2022
-
-
Andrew Waterman authored
-
Andrew Waterman authored
-
- Sep 02, 2022
-
-
Andrew Waterman authored
It's nearly free to do so, because it's just virtual address space. @davidbiancolin recently fell into this pit when using context_t with VCS.
-
- Sep 01, 2022
-
-
Kip Walker authored
-
- Aug 29, 2022
-
-
Scott Johnson authored
Fix tval on illegal instruction faults with long illegal instruction
-
Rupert Swarbrick authored
The autoconf @libdir@ and @includedir@ variables include the prefix part so we were generating things like "/usr//usr/lib".
-
- Aug 28, 2022
-
-
YenHaoChen authored
The current spike implementation does not include the ILEN (maximum instruction length supported by the implementation), which is required to constrain the value of tval on an illegal instruction exception. Consider an implementation supporting only an RV64I base instruction set. The ILEN is 32 bits (spec sec. 1.5), and the MXLEN is 64 bits (spec sec. 5.1). Under an illegal instruction exception with the instruction longer than the ILEN, the mtval should contain the first ILEN (32 bits) of the faulting instruction. However, the current spike implementation lets the mtval be the instruction's first MXLEN (64 bits). To fix this bug, this PR masks out the upper bits of the tval and leaves the first ILEN bits of the faulting instruction. When this PR is being made, all official instructions are either 16 or 32 bits. So, We hard- code the ILEN to 32 bits.
-
- Aug 24, 2022
-
-
Andrew Waterman authored
Rename misleading variable
-
Scott Johnson authored
Because it's always better to do so where possible.
-
Scott Johnson authored
No reason to use a variable misleadingly named 'paddr' to hold the virtual address.
-
- Aug 23, 2022
-
-
yangcheng authored
-
Andrew Waterman authored
These are just HINTs, so Spike only needs ISA-parser support.
-
- Aug 13, 2022
-
-
ksco authored
-