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riscv-software-src
riscv-isa-sim
Commits
c0b3fdcb
Commit
c0b3fdcb
authored
Jul 12, 2022
by
Weiwei Li
Browse files
modify the check for "state->prv >= PRV_M" to "state->prv == PRV_M"
prv can never be larger than PRV_M
parent
d6f332d6
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