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riscv-software-src
riscv-isa-sim
Commits
a66ca951
Commit
a66ca951
authored
Oct 25, 2022
by
Andrew Waterman
Browse files
Change SEW=16 vfncvt.f.f.w and vfwcvt.f.f.v to require Zvfhmin
...as opposed to Zfh.
parent
54825e37
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