- Dec 17, 2022
-
-
Bin Meng authored
The number of interrupt enable register in words was once correct, but was wrongly changed to have an off-by-one error since commit 8c362e7d ("lib: irqchip/plic: Factor out a context init function"). Fixes: 8c362e7d ("lib: irqchip/plic: Factor out a context init function") Signed-off-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org> Reviewed-by:
Samuel Holland <samuel@sholland.org>
-
Bin Meng authored
Currently the priority save/restore helpers writes/reads the provided array using an index whose maximum value is determined by PLIC, which potentially may disagree with the caller to these helpers. Add a parameter to ask the caller to provide the size limit of the array to ensure no out-of-bound access happens. Signed-off-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Bin Meng authored
Interrupt source 0 is reserved. Hence the irq should start from 1. Fixes: 2b79b694 ("lib: irqchip/plic: Add priority save/restore helpers") Signed-off-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
- Dec 12, 2022
-
-
Lad Prabhakar authored
This patch adds documentation to build Renesas RZ/Five (R9A07G043F) SoC. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Lad Prabhakar authored
This commit provides basic support for the Renesas RZ/Five (R9A07G043F) SoC. The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP) 1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include: - Gigabit Ethernet 2ch - CAN interface (CAN-FD) 2ch - USB 2.0 interface 2ch - SD interface 2ch - AD converter 2ch Useful links: ------------- Links: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet Links: http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/ Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Lad Prabhakar authored
Add compatible string for Andestech NCEPLIC100 found on Renesas RZ/Five SoC which is equipped with AX45MP AndesCore. While at it drop the comma after the sentinel as it does not make sense to have a comma after a sentinel, as any new elements must be added before the sentinel. dts example (Single-core AX45MP): soc: soc { .... plic: interrupt-controller@12c00000 { compatible = "renesas,r9a07g043-plic", "andestech,nceplic100"; #interrupt-cells = <2>; #address-cells = <0>; riscv,ndev = <511>; interrupt-controller; reg = <0x0 0x12c00000 0 0x400000>; clocks = <&cpg CPG_MOD R9A07G043_NCEPLIC_ACLK>; power-domains = <&cpg>; resets = <&cpg R9A07G043_NCEPLIC_ARESETN>; interrupts-extended = <&cpu0_intc 11 &cpu0_intc 9>; }; .... }; Signed-off-by:Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Anup Patel <anup@brainfault.org> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
Lad Prabhakar authored
Add FDT driver for Renesas SCIF. dts example: soc: soc { .... scif0: serial@1004b800 { compatible = "renesas,scif-r9a07g043", "renesas,scif-r9a07g044"; reg = <0 0x1004b800 0 0x400>; interrupts = <412 IRQ_TYPE_LEVEL_HIGH>, <414 IRQ_TYPE_LEVEL_HIGH>, <415 IRQ_TYPE_LEVEL_HIGH>, <413 IRQ_TYPE_LEVEL_HIGH>, <416 IRQ_TYPE_LEVEL_HIGH>, <416 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>; clock-names = "fck"; power-domains = <&cpg>; resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>; status = "disabled"; }; .... }; Signed-off-by:Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Lad Prabhakar authored
Add Renesas SCIF driver. Based on a patch in the BSP by Takeki Hamada <takeki.hamada.ak@bp.renesas.com> Link: https://github.com/renesas-rz/rz_opensbi/commits/work/OpenSBI-PMA Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
- Dec 11, 2022
-
-
Himanshu Chauhan authored
Not all systems have bash at a fixed location like /bin/bash. FreeBSD, for example, would typically have it at /usr/local/bin/bash. When building OpenSBI on freebsd system, the build breaks. Its advisable to use: #!/usr/bin/env bash Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
- Dec 09, 2022
-
-
Himanshu Chauhan authored
As per section 3.7.2 of RISC-V Privileged Specification, PMP settings must be synchronized with the virtual memory system after PMP settings have been written. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Heinrich Schuchardt authored
After determining cpu_offset we have to check this value. Addresses-Coverity-ID: 1529706 ("Logically dead code") Signed-off-by:Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Atish Patra <atishp@rivosinc.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Heinrich Schuchardt authored
If fdt_getprop() returns NULL, this indicates an error. In this case lenp is set to an error code. But even if lenp = 0 we should not continue. If fdt_getprop() returns a wider value than we expect this is a separate error condition. In both cases the device-tree is invalid. Addresses-Coverity-ID: 1529703 ("Dereference after null check") Signed-off-by:Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Heinrich Schuchardt authored
For 'reg->order == __riscv_xlen' the term 'BIT(reg->order)' is undefined. Addresses-Coverity-ID: 1529706 ("Bad bit shift operation") Signed-off-by:Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Lad Prabhakar authored
It makes sense to use fdt_match_node() instead of fdt_find_match() in fw_platform_lookup_special() as we already have the start offset to search from. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
- Dec 05, 2022
-
-
Sergey Matyukevich authored
Update .gitignore for vim swap files. Signed-off-by:
Sergey Matyukevich <sergey.matyukevich@syntacore.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Lad Prabhakar authored
Add a helper function fdt_fixup_node() based on the compatible string. This will avoid code duplication for every new node fixup being added. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Yu Chien Peter Lin authored
The andes-specific files have been moved to generic platform so we can drop this line. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Yu Chien Peter Lin authored
The example should use watchdog as nodename instead of wdt. This is defined in watchdog common schemas: https://github.com/torvalds/linux/blob/v6.0/Documentation/devicetree/bindings/watchdog/watchdog.yaml#L19 Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Yu Chien Peter Lin authored
Update compile option and platform compatible string for AE350 and add it to the generic platform list. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Yu Chien Peter Lin authored
We move andes directory to platform/generic as the necessary fdt drivers are available, the users can enable the console, timer, ipi, irqchip and reset devices by adding device tree nodes stated in the docs/platform/andes-ae350.md. Signed-off-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Dongdong Zhang authored
The t3 register stores the address of _load_end. If relocation is not required, it is unnecessary to calculate the address of _load_end. This can reduce the operation time of two instructions. Signed-off-by:
Dongdong Zhang <zhangdongdong@eswincomputing.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Heinrich Schuchardt authored
After determining cpu_offset we have to check this variable and not cpu_intc_offset. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
Heinrich Schuchardt authored
Don't assign a value to offset which is never used. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
Heinrich Schuchardt authored
cpu_offset and cpu_intc_offset must be int to detect failed invocations of fdt_node_offset_by_phandle() or fdt_parent_offset(). After determining cpu_offset we have to check this value and not cpu_intc_offset. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
Heinrich Schuchardt authored
cpu_offset, cpu_intc_offset must be int to discover failed invocations of fdt_node_offset_by_phandle() or fdt_parent_offset(). After determining cpu_offset we have to check this value and not cpu_intc_offset. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
Heinrich Schuchardt authored
We should not check !plicsw_base || !size twice. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
Heinrich Schuchardt authored
We should not check !plmt_base || !plmt_size twice. Signed-off-by:
Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
Xiang W authored
When order is equal to __riscv_xlen, the shift operation will not perform any operation, which will cause reg->base & (BIT(reg->order) - 1) to always be 0, and the condition has not been established. This patch fixes this bug. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
- Dec 04, 2022
-
-
Xiang W authored
We simplify the mmio flag matching in sbi_domain_check_addr(). Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Alejandro Cabrera Aldaya authored
If the path where this repo is located contains the platform name on it, the original Makefile replaced its occurrences from the path making it an invalid path. This commit prevents this behavior replacing only the last part of the path as intended. Signed-off-by:
Alejandro Cabrera Aldaya <aldaya@gmail.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
KaDiWa authored
I don't know why but `echo -n` didn't work for me. macOS supports the `-n` option but it doesn't work in the makefile. What it does instead is it literally writes `-n` to the file and then also leaves a newline at the end. I'm using GNU Make 4.4 (`gmake` from Homebrew). Signed-off-by:
KaDiWa <kalle.wachsmuth@gmail.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Xiang W authored
Corrected the same parameter of writel_relaxed in sun20i_d1_riscv_cfg_init to be u32 for a while and u64 for a while. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
- Nov 22, 2022
-
-
Leizheng Zhang authored
Remove "#include <sbi/sbi_console.h>" Signed-off-by:
Leizheng Zhang <zhangleizheng@eswincomputing.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org> Reviewed-by:
Xiang W <wxjstz@126.com>
-
Leizheng Zhang authored
Delete the redundant "ALIGN" and adjust the position of "ALIGN" Signed-off-by:
Leizheng Zhang <zhangleizheng@eswincomputing.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Atish Patra <atishp@rivosinc.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
- Nov 15, 2022
-
-
Vivian Wang authored
Split up sbi_ecall_replace so that each extension is in its individual file. Also reorganize the corresponding section in lib/sbi/objects.mk so that it is grouped by extension, now that the object file targets are split up. Signed-off-by:
Vivian Wang <dramforever@live.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Anup Patel authored
We fix the following semihosting compile error observed using LLVM: lib/utils/serial/semihosting.c:158:12: error: result of comparison of constant -1 with expression of type 'char' is always true [-Werror,-Wtautological-constant-out-of-range-compare] ret = ch > -1 ? ch : -1; ~~ ^ ~~ Fixes: 7f09fba8 ("lib: utils/serial: add semihosting support") Signed-off-by:Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Bin Meng <bmeng@tinylab.org>
-
zhangdongdong authored
Corrected the typos of some documents in the 'docs' folder. Signed-off-by:
zhangdongdong <zhangdongdong@eswincomputing.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Xiang W authored
Simplified fdt_parse_xxx_uart_node which direct call fdt_parse_uart_node_common. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Atish Patra <atishp@rivosinc.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
Xiang W authored
uart->reg_offset and uart->reg_io_width are only used on uart8250 and not required on other platforms. Remove for sifive and gaisler. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Atish Patra <atishp@rivosinc.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-
- Oct 23, 2022
-
-
Vivian Wang authored
For each SBI extension, we: - Add a Kconfig option for it - Add the extension to sbi_ecall_exts only if the extension is enabled - Add the corresponding sbi_ecall_* object file only if the extension is enabled Special cases are as follows: - The legacy extensions are lumped together as one 'big' extension, as has always been the case in OpenSBI code. - The platform-defined vendor extensions are regarded as one extension. - The Base extension cannot be disabled. - sbi_ecall_replace implements multiple extensions, so it's not easy to avoid linking it in. Enable it always, and use #ifdef to disable/enable individual extensions. Signed-off-by:
Vivian Wang <dramforever@live.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
-