- Jul 13, 2023
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Himanshu Chauhan authored
- If Smepmp is enabled, the access flags of an entry are determined based on truth table defined in Smepmp. - First PMP entry (index 0) is reserved. - Existing boot PMP entries start from index 1. - Since enabling Smepmp revokes the access privileges of the M-mode software on S/U-mode region, first PMP entry is used to map/unmap the shared memory between M and S/U-mode. This allows a temporary access window for the M-mode software to read/write to S/U-mode memory region. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Himanshu Chauhan authored
Configure PMP at last when all other initializations have been done. Because if SMEPMP is detected, M-mode access to the S/U space will be rescinded. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Himanshu Chauhan authored
Since pmp entries have implicit priority on index, previous entries will deny access to SU on M-mode region. Also, M-mode will not have access to SU region while previous entries will allow access to M-mode regions. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Himanshu Chauhan authored
- Add function to parse ISA string in FDT. - Set Smepmp feature bit in extensions if "smepmp" string is found in ISA string. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Himanshu Chauhan authored
- Add Smepmp as extension in sbi_hart_extensions enum - Return "smepmp" string for Smepmp extension from sbi_hart_extension_id2string Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Himanshu Chauhan authored
Smepmp specification defines a truth table based on which the access is allowed to different modes. This patch adds different flags based on this truth table. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Himanshu Chauhan authored
- Add a function to disable a given PMP entry. - Add a function to check if a given entry is disabled. Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Himanshu Chauhan authored
- Add macros for Machine Security Configuration (mseccfg) CSR - Add macros to access/manipulate bits in msecfg CSR Signed-off-by:
Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jul 12, 2023
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Anup Patel authored
Currently, we see following compile error in the designeware GPIO driver for RV32 systems: lib/utils/gpio/fdt_gpio_designware.c:115:20: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 115 | chip->dr = (void *)addr + (bank * 0xc); | ^ lib/utils/gpio/fdt_gpio_designware.c:116:21: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 116 | chip->ext = (void *)addr + (bank * 4) + 0x50; We fix the above error using an explicit type-cast to 'unsigned long'. Fixes: 7828eeba ("gpio/desginware: add Synopsys DesignWare APB GPIO support") Signed-off-by:Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Xiang W authored
Fix special case: sbi_snprintf(out, out_len, ...) when out_len equal 1, The previous code will not fill the buffer with any char. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
A single scan of the format char may add multiple characters to the tbuf, causing a buffer overflow. You should check if tbuf is full in printc so that it does not cause a buffer overflow. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
Because *out needs to reserve a byte to hold '\0', no more characters should be added to the buffer when *out has one byte left, and the buffer size *out_len should not be modified. this patch prevents the correction of *out_len when *out_len is 1. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
When doing width = width - strlen(string) in prints there is no need to consider the case that witdh may be less than 0. This is because the code to do filling needs to be executed under the condition that width > 0. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
Fix two bug: > printf("%#08x", 0x123); /* print 0000x123 */ > printf("%#x", 0); /* print 0x0 */ Signed-off-by:Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
Add o type for print to print octal numbers Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
The information of sg/b/letbase can be obtained by the type character, simplifying the parameter by passing the type directly. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
The space flag is used to add a space before positive numbers, and apostrophe is used to print the thousand separator. Add code to ignore these two flags Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
Adds + flags for print, prefixing positive numbers with + when this flags is present Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
Left alignment and padding '0' should not exist at the same time, this patch skips padding. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
The flags for print should be able to appear in any order. The previous code required the order to be fixed. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jul 09, 2023
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Ley Foon Tan authored
Fix Priv spec version typo in commit d4b563c8 ("lib: sbi: Remove MCOUNTEREN and SCOUNTEREN hart features"). At least Priv spec v1.11 is required for [m|s]counteren and mcountinhibit CSRs. Fixes: d4b563c8 ("lib: sbi: Remove MCOUNTEREN and SCOUNTEREN hart features") Signed-off-by:
Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Anup Patel authored
The hart_pmu_get_allowed_bits() function detects implemented bits of mhpm counters so let us rename this function accordingly. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
Let us follow alphabetical order for HART ISA extension so that it is simpler to maintain. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
Recently ratified Zihpm ISA extension covers all [m]hpm* CSRs so we add Zihpm as a HART ISA extension in OpenSBI. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
Recently ratified Zicntr ISA extension covers cycle, time and instret CSRs so we replace the "time" ISA extension with "zicntr" ISA extension in OpenSBI. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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Anup Patel authored
The cold_init() functions of ACLINT drivers should skip the HART if sbi_hartid_to_scratch() returns NULL because we might be dealing with a HART that is disabled in the device tree. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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- Jul 07, 2023
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Ben Dooks authored
Add a driver for the Synopsys DesignWare APB GPIO IP block found in many SoCs. Signed-off-by:
Ben Dooks <ben.dooks@sifive.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jul 05, 2023
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Heinrich Schuchardt authored
On a misconfigured system we could access phs->active_events[] out of bounds. Check that num_hw_ctrs is less or equal SBI_PMU_HW_CTR_MAX. Addresses-Coverity-ID: 1566113 ("Out-of-bounds read") Addresses-Coverity-ID: 1566114 ("Out-of-bounds write") Signed-off-by:Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Gianluca Guida authored
Use tabs rather than spaces. Signed-off-by:
Gianluca Guida <gianluca@rivosinc.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jun 23, 2023
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Anup Patel authored
This patch updates OpenSBI version to 1.3 as part of release preparation. Signed-off-by:Anup Patel <apatel@ventanamicro.com>
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Gianluca Guida authored
Do not ignore register A2 (high bits of physical address) in the dbcn handler (RV64). Signed-off-by:
Gianluca Guida <gianluca@rivosinc.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jun 21, 2023
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Guo Ren authored
The fdt_reset_thead driver needs to modify the __reset_thead_csr_stub text region for the secondary harts booting. After that, the sbi_hart_pmp_configure may lock down the text region with M_READABLE & M_EXECUTABLE attributes in the future. Currently, the M_READABLE & M_EXECUtABLE have no effect on m-mode, the L-bit in pmpcfg csr is useless for the current opensbi scenario. See: Priv-isa-spec 3.7.1.2. Locking and Privilege Mode When the L bit is clear, any M-mode access matching the PMP entry will succeed; the R/W/X permissions apply only to S and U modes. That's why current fdt_reset_thead could still work well after commit: 230278dc ("lib: sbi: Add separate entries for firmware RX and RW regions"). So this patch fixes up a fake bug for the M-mode permission setting of the future. Fixes: 230278dc ("lib: sbi: Add separate entries for firmware RX and RW regions") Link: http://lists.infradead.org/pipermail/opensbi/2023-June/005176.html Reported-by:
Jessica Clarke <jrtc27@jrtc27.com> Signed-off-by:
Guo Ren <guoren@linux.alibaba.com> Signed-off-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Anup Patel <anup@brainfault.org>
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Xiang W authored
After the loop to find the hartid is launched, assigning -1 to index will fail in the subsequent compare instruction bge. Fix This. Signed-off-by:
Xiang W <wxjstz@126.com> Reviewed-by:
Anup Patel <anup@brainfault.org>
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- Jun 15, 2023
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Alexandre Ghiti authored
This reverts commit 6966ad0a ("platform/lib: Allow the OS to map the regions that are protected by PMP"). It was thought at the time of this commit that allowing the kernel to map PMP protected regions was safe but it is actually not: for example, the hibernation process will try to access any linear mapping page and then will fault on such mapped PMP regions [1]. Another issue is that the device tree specification [2] states that a !no-map region must be declared as EfiBootServicesData/Code in the EFI memory map which would make the PMP protected regions reclaimable by the kernel. And to circumvent this, RISC-V edk2 diverges from the DT specification to declare those regions as EfiReserved. The no-map attribute was removed to allow the kernel to use hugepages larger than 2MB to map the linear mapping to improve the performance but actually a recent talk from Mike Rapoport [3] stated that the performance benefit was marginal. For all those reasons, let's mark all the PMP protected regions as "no-map". [1] https://lore.kernel.org/linux-riscv/CAAYs2=gQvkhTeioMmqRDVGjdtNF_vhB+vm_1dHJxPNi75YDQ_Q@mail.gmail.com/ [2] "3.5.4 /reserved-memory and UEFI" https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4-rc1/devicetree-specification-v0.4-rc1.pdf [3] https://lwn.net/Articles/931406/ Signed-off-by:
Alexandre Ghiti <alexghiti@rivosinc.com> Reviewed-by:
Atish Patra <atishp@rivosinc.com> Reviewed-by:
Xiang W <wxjstz@126.com>
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- Jun 14, 2023
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Anup Patel authored
Over-time a lot of organizations and individuals have contributed to the OpenSBI project so let us add copyright RISC-V International to respect the contributions from all RISC-V members. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
We do have an official OpenSBI logo which was designed few months ago and was also approved by RISC-V International. Lets add this logo under docs and also use it in the top-level README.md Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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- Jun 06, 2023
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART IMSIC pointer and IMSIC file number. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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- Jun 05, 2023
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Anup Patel authored
The imsic_map_hartid_to_data() already checks hartid before using so we don't need to check in imsic_update_hartid_table(). Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART PLIC pointer and PLIC context numbers. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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Anup Patel authored
Instead of using a global array indexed by hartid, we should use scratch space to save per-HART MTIMER pointer. Signed-off-by:
Anup Patel <apatel@ventanamicro.com> Reviewed-by:
Andrew Jones <ajones@ventanamicro.com>
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