Commit ec0559eb authored by Amanieu d'Antras's avatar Amanieu d'Antras Committed by Anup Patel
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lib: sbi_misaligned_ldst: Fix handling of C.SWSP and C.SDSP



Unlike C.LWSP/C.LDSP, these encodings can be used with the zero
register, so checking that the rs2 field is non-zero is unnecessary.

Additionally, the previous check was incorrect since it was checking
the immediate field of the instruction instead of the rs2 field.

Signed-off-by: default avatarAmanieu d'Antras <amanieu@gmail.com>
Reviewed-by: default avatarAnup Patel <anup@brainfault.org>
parent 3632f2b5
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