Merge #95

95: Pass a0..a2 to main() r=almindor a=Disasm

This PR delivers arguments stored in a0..a2 to `main`.

Fixes https://github.com/rust-embedded/riscv-rt/issues/92



Tested with:
* build the `empty` example for `riscv64imac-unknown-none-elf` with a memory file which puts everything to `0x80000000`
* run `qemu-system-riscv64 -nographic -machine virt -bios target/riscv64imac-unknown-none-elf/release/examples/empty -s -S`
* connect to qemu with gdb (`target remote :1234`)
* set breakpoint to main (`b main`)
* resume execution (`continue`)
* inspect registers (`info registers`)
```
a0             0x0	0
a1             0x87000000	2264924160
a2             0x1028	4136
```
* check header (`x/xw 0x87000000`)
```
0x87000000:	0xedfe0dd0
```

Co-authored-by: Vadim Kaushan <admin@disasm.info>