- Sep 19, 2023
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vlsunil authored
Obsolete guidance doc and reset to default RISC-V template
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Sunil V L authored
The ACPI guidance document which was hosted here was never frozen/ratified. Instead, the relavant contents are created in BRS TG as non-normative document [1]. So, reset this repo to default RVI template and remove existing content so that it doesn't cause confusion with BRS TG's spec. [1] - https://github.com/riscv-non-isa/riscv-brs/blob/main/non-normative/acpi.adoc Signed-off-by:
Sunil V L <sunilvl@ventanamicro.com>
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- May 23, 2023
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vlsunil authored
Fix and improve RIMT
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- Apr 21, 2023
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Sebastien Boeuf authored
I don't think having a field referring to a number of items should include the complexity of the so called N-1 convention. If the goal is to enforce these fields to never be 0, then let's write it down in the specification so that different implementations can error out if these fields hold a value of 0. Signed-off-by:Sebastien Boeuf <seb@rivosinc.com>
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Sebastien Boeuf authored
The fields of the RIMT don't need to be specified with bullet points given they're already part of a table. Signed-off-by:Sebastien Boeuf <seb@rivosinc.com>
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Sebastien Boeuf authored
The byte offset was either wrong or not specified, which is fixed by this change. Signed-off-by:Sebastien Boeuf <seb@rivosinc.com>
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Sebastien Boeuf authored
Ran a spell checker to identify grammar issues. Signed-off-by:Sebastien Boeuf <seb@rivosinc.com>
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- Jan 12, 2023
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vlsunil authored
RIMT: Editorial updates
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Sunil V L authored
Signed-off-by:Ved Shanbhogue <ved@rivosinc.com>
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- Nov 01, 2022
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vlsunil authored
Signed-off-by:vlsunil <sunilvl@ventanamicro.com>
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- Jul 14, 2022
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vlsunil authored
Add RIMT for IOMMU mapping
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Sunil V L authored
Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Jul 12, 2022
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vlsunil authored
Guidance document with more details
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Sunil V L authored
Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Jun 21, 2022
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vlsunil authored
readme: Fix the broken contributors.adoc link
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Bin Meng authored
This repo does not have a 'main' branch. Signed-off-by:Bin Meng <bmeng.cn@gmail.com>
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- Jun 15, 2022
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Stephano Cetola authored
Add GitHub workflow for building PDFs
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Stephano Cetola authored
Signed-off-by:Stephano Cetola <scetola@linuxfoundation.org>
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- Jun 07, 2022
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Sunil V L authored
Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Jan 31, 2022
- Jan 27, 2022
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Sunil V L authored
Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Jan 26, 2022
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vlsunil authored
Delete UEFI spec
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Sunil V L authored
Since now we have hosted UEFI spec in separate repo, removing it from here. Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Dec 06, 2021
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vlsunil authored
Add UEFI boot protocol required on UEFI systems.
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Sunil V L authored
Currently added in this repo since it is reuqired for ACPI enablement. However, it can be hosted in some other repo or in UEFI spec itself in future. Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Dec 05, 2021
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vlsunil authored
Update the tables with latest understanding and feedback
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- Dec 03, 2021
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Sunil V L authored
1) Rename REDT to RHCT since there may be some information without an extension. 2) Rename files 3) Add the extension table description in the main acpi requirement 4) Extension grouping is still being defined by tech-config. Hence, keeping a simple table with which PoC done as version_1. Moved the proposed one to v2 since it needs major refinement after tech-config freezes the schema. 5)AIA related information removed from extension table as per feedback from Jessica. Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Oct 13, 2021
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vlsunil authored
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vlsunil authored
Add RISC-V Timer Description Table (RTDT). This table is required to communicate information regarding timer devices. Currently, only time_base_frequency is added. But in future revisions of this table, more information regarding timer device and watchdog device can be added to this table. The plan is to maintain this table within RVI organization and provide a reference to it from the ACPI spec. A separate code-first proposal may be required to add the reference in ACPI spec. Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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vlsunil authored
Different RISC-V platforms can support different extensions. A new ACPI table is required to communicate this information to the OS. This table will be maintained by the RVI and a reference will be added in ACPI spec. This table will be made mandatory in the RISC-V ACPI requirements document. Any new extension should reserve its unique ID (16 bit) if ACPI support is required for the platform implementing the extension. Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Sep 24, 2021
- Sep 15, 2021
- Aug 26, 2021
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Aaron Durbin authored
The asciidoc file is riscv-acpi-platform-req.adoc. Fix the build by using the correct file name. Signed-off-by:Aaron Durbin <adurbin@rivosinc.com>
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- Aug 13, 2021
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vlsunil authored
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- Aug 07, 2021
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Sunil V L authored
Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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Sunil V L authored
Remove IOMMU and PMU related requirements. Will add if required when there is more clarity. Signed-off-by:Sunil V L <sunilvl@ventanamicro.com>
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- Aug 06, 2021
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Sunil V L authored
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