This links against "libnosys" instead of "libgloss".  As a result, there
should be no "ecall" instructions in any program unless you explicitly
put them there yourself.  "libnosys" provides system call routines that
error out at runtime instead of calling system calls, so nominally this
toolchain is still a legal

Move to glibc-2.26, and the latest Linux headers (riscv-for-submissio…

Add travis-ci status image in README.md

I'm trying to get all our ports up to date with the latest stable
versions, just for my own sanity.  This handles glibc, but pushes Linux
a bit past what's currently stable.

Run the GCC test suite on Travis

I don't run any multilib tests here because they take too long for
Travis.

This builds everything, runs the test suites, and then diffs against the
whitelists to make sure there aren't any new failures.

I haven't actually done my due diligance here to ensure this is the
minimal set of test failures.

We need QEMU to run the test suite.  This patch automates the build so
I don't need to keep remembering how to do it by hand.

Bump binutils

5852e73c72db RISC-V: Support PCREL_* relocations agaist weak undefined symbols

bump binutils, to allow mixing RVC and no-RVC

* 0419befe6f92 (WIP) RISC-V: Provide better disassembly of alignment
  sequences
* 160ba91886e3 (WIP) objdump: Provide the found reloc to the disassembler
* 779cd1f46451 (WIP) RISC-V: Avoid emitting invalid instructions in mixed
  RVC/no-RVC code
* ceef952725fb (WIP) RISC-V: Print an error when unable to align a section

Allow users to override the tuples

The default ISA is GC

A user just added RTEMS support to the GCC port (via newlib), which is
very similar to the existing newlib port but has a different tuple.
This patch allows users to override the tuples to build other targets if
they want to.

Add support for --with-guile configure flag

Bump newlib to 2.5

And re-run autoreconf to generate the configure script.

Signed-off-by: Johannes Löthberg <johannes@kyriasis.com>

16210e6 RISC-V: Handle non-legitimate address in riscv_legitimize_move

This makes it easier to use this repo to build other toolchains,
as I occasionally want to do.

I'm hoping this will speed up our builds a bit, as we'll no longer be
executing in a VM but instead in a container.

ff03ebe RISC-V: Add Sign/Zero extend patterns for PIC loads
2fe94d5 RISC-V: Add -mstrict-align option
f9771ad RISC-V: Unify indention in riscv.md

RISC-V: Fix disassemble for c.li, c.andi and c.addiw

Update binutils and glibc

 * RISC-V: Prohibit relaxing the initial gp generation

 * RISC-V: Change CALL macro to use ra as the temporary address register
 * RISC-V: Allow 32-bit BFD to handle 64-bit objects
 * RISC-V: Resurrect GP-relative disassembly hints
 * RISC-V/bfd: Hook elf_backend_object_p to set the mach type.

Allow users to flip "--with-system-zlib"

We need this to have different polarity for different platforms (Windows
vs RedHat).  I don't know how to autodetect this for now, so I'm just
doing it manually.

This reverts commit 237c8816.

Allow Windows builds