PR101609: Use the correct iterator for AArch64 vector right shift pattern

Loops containing long long shifts fail to vectorize due to the vectorizer
not being able to recognize long long right shifts. This is due to a bug
in the iterator used for the vashr and vlshr patterns in aarch64-simd.md.

2021-08-09  Tejas Belagod  <tejas.belagod@arm.com>

gcc/ChangeLog
	PR target/101609
	* config/aarch64/aarch64-simd.md (vlshr<mode>3, vashr<mode>3): Use
	the right iterator.

gcc/testsuite/ChangeLog
	* gcc.target/aarch64/vect-shr-reg.c: New testcase.
	* gcc.target/aarch64/vect-shr-reg-run.c: Likewise.