Fix the loadL according the arm 32bit

If the dst is same with the mem, it need to store the hi 32bit data. It can avoid the data
been rewrite.

Changed the 'java function register(caller-save registers)'

The 'java function register(caller-save registers)' has changed in the PR472, but this change will
make the TestReflectInvoke testcase of interpreter failed. This pr will fix that. After this change,
the TestReflectInvoke testcase of interpreter will successed.

improve the object code in generate_call_stub

Fix two temp regs in do_oop_load/do_oop_store

Fix the x10/x11 in save/restore_native_result

Fix the i2c and c2i adapter according arm 32bit

Fix the RegisterImpl::number_of_registers in riscv32.ad

The RegisterImpl::number_of_registers don't need to - 2, because it will not change in riscv32.ad, it
is always 32.

Fix the RFLAGS in riscv32.ad

The RFLAGS sometimes need to store the long data, so it need to use the x5.
Some RFLAGS be instead of t1, they are not incorrect.

Fix the num errors in zero_words() imm

Fix the lrem/ldiv in macroassembler

Fix the reg error in MoveL2D_reg_reg

Fix the immLAdd data type errors in riscv32.ad

Fix the long data in signExtractL of riscv32.ad

Fix the param type in castX2P of riscv32.ad

Add 64bit support for implementation() in riscv32.ad

Fix the error in pr461

Fix the call_VM_leaf in riscv32.ad

Revert "Use the esp operations intead of the call_VM_leaf in riscv32.ad"

Use the esp operations intead of the call_VM_leaf in riscv32.ad