Updated hardware loop instruction encodings

These hardware loop instructions have different encodings for
CV32E40Pv2 compared to CV32E40Pv1. These new encodings can be
found at:
https://github.com/openhwgroup/cv32e40p/blob/master/docs/source/instruction_set_extensions.rst

CV32E40Pv2 changed how uimml in cv.starti, cv.endi, and cv.setup
was encoded. The same is true for uimmS in cv.setupi. This
changed the relocations for each immediate as well.

Both the GAS and linker tests were updated too.

Files Changed:

bfd:
 * elfxx-riscv.c: Changed the CORE-V hardware loop relocations to
   rightshift 2.

gas/config:
 * tc-riscv.c: Changed encoding of uimmL and uimmS in hardware loop
   instructions.

gas/testsuite/gas/riscv:
 * cv-hwlp-endi.d: Updated tests.
 * cv-hwlp-endi.s: Likewise.
 * cv-hwlp-fail-operand-01.l: Likewise.
 * cv-hwlp-fail-operand-01.s: Likewise.
 * cv-hwlp-fail-operand-02.l: Likewise.
 * cv-hwlp-fail-operand-03.l: Likewise.
 * cv-hwlp-fail-operand-03.s: Likewise.
 * cv-hwlp-fail-operand-04.l: Likewise.
 * cv-hwlp-fail-operand-10.s: Likewise.
 * cv-hwlp-march-rv32i-xcorev.d: Likewise.
 * cv-hwlp-setup.d: Likewise.
 * cv-hwlp-setup.s: Likewise.
 * cv-hwlp-setupi.d: Likewise.
 * cv-hwlp-setupi.s: Likewise.
 * cv-hwlp-starti.d: Likewise.
 * cv-hwlp-starti.s: Likewise.

ld/testsuite/ld-riscv-elf:
 * cv-hwlp-endi.d: Updated tests.
 * cv-hwlp-setup.d: Likewise.
 * cv-hwlp-setupi.d: Likewise.
 * cv-hwlp-starti.d: Likewise.

opcodes:
 * riscv-dis.c: Changed how the relocation is printed.