PULP: Added SIMD (Single Instruction Multiple Data) Version 1.0.0

     extension in assembler

    	   The SIMD instructions perform operations on multiple sub-word
    	   elements at the same time. This is done by segmenting the
    	   data path into smaller parts when 8 or 16-bit operations
    	   should be performed.

    	   The custom SIMD extensions are only supported if PULP_XPULP == 1.

            bfd/
                * elfxx-riscv.c: (riscv_multi_subset_supports): Added
                  INSN_CLASS_XCOREVSIMD.
                * elfxx-riscv.c: (riscv_multi_subset_supports_ext): Likewise.

            gas/config/
            	* tc-riscv.c: (validate_riscv_insn): Added operand code 'b5'
            	for SIMD Imm6 operand.
            	* tc-riscv.c: (riscv_ip): Added signed Imm6 range.

            include/opcode/
            	* riscv-opc.h: Added SIMD Match and Mask Macros.
            	* riscv.h: Added EXTRACT_CV_SIMD_IMM6 and
            	  ENCODE_CV_SIMD_IMM6.
            	* riscv.h: (riscv_insn_class): Added
            	  INSN_CLASS_COREV_SIMD.

            opcodes/
            	* riscv-dis.c: (print_insn_args): Disassemble info
            	  with EXTRACT_CV_SIMD_IMM6.
            	* riscv-opc.c: Added SIMD Instructions.

Signed-off-by: NandniJamnadas <nandni.jamnadas@embecosm.com>