Changed post increment load/store encodings to CV32E40P
gas/testsuite/gas/riscv:
* cv-mem-lbrr.d: Updated expected output of test.
* cv-mem-lbrrpost.d: Likewise.
* cv-mem-lburr.d: Likewise.
* cv-mem-lburrpost.d: Likewise.
* cv-mem-lhrr.d: Likewise.
* cv-mem-lhrrpost.d: Likewise.
* cv-mem-lhurr.d: Likewise.
* cv-mem-lhurrpost.d: Likewise.
* cv-mem-lwrr.d: Likewise.
* cv-mem-lwrrpost.d: Likewise.
* cv-mem-march-rv32i-xcorev.d: Likewise.
* cv-mem-sbrr.d: Likewise.
* cv-mem-sbrrpost.d: Likewise.
* cv-mem-shrr.d: Likewise.
* cv-mem-shrrpost.d: Likewise.
* cv-mem-swrr.d: Likewise.
* cv-mem-swrrpost.d: Likewise.
include/opcode:
* riscv-opc.h: Changed post increment load/store encodings to
CV32E40P.
Signed-off-by:
Mary Bennett <mary.bennett@embecosm.com>
parent
6b6b2d48
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