RISC-V: Fixed the overflow values for cv relocations

Issue #73: https://github.com/openhwgroup/corev-binutils-gdb/issues/73

The issue describes a problem with the hardware loop relocations; they do
not properly check for overflow. The function bfd_check_overflow in
bfd/reloc.c was used to check for overflow by the assembler. It has now
been moved to the linker.

Files Changed:

 * bfd/elfnn-riscv.c (perform_relocation): Added overflow check for
   R_RELOC_RISCV_CVPCREL_UI12 and R_RELOC_RISCV_CVPCREL_URS1.
 * gas/config/tc-riscv.c(md_apply_fix): Removed the assembler
   relocation overflow check for R_RELOC_RISCV_CVPCREL_UI12 and
   R_RELOC_RISCV_CVPCREL_URS1.

ld/testsuite/ld-riscv-elf:
 * cv-hwlp-pass.d: New test.
 * cv-hwlp-pass.s: Likewise.
 * cv-hwlp-setupi-2.d: Likewise.
 * cv-hwlp-setupi-2.s: Likewise.
 * cv-hwlp-setupi-fail.d: Likewise.
 * cv-hwlp-setupi-fail.l: Likewise.
 * cv-hwlp-setupi-fail.s: Likewise.
 * cv-hwlp-starti-2.d: Likewise.
 * cv-hwlp-starti-2.s: Likewise.
 * cv-hwlp-starti-fail.d: Likewise.
 * cv-hwlp-starti-fail.l: Likewise.
 * cv-hwlp-starti-fail.s: Likewise.
 * ld-riscv-elf.exp: Likewise.