CV32E40Pv2 MAC pseudo-instructions

	This is where `cv.mul* rD, rs1, rs2` is `cv.mul*n rD, rs1, rs2, 0`.

	* include/opcode/riscv-opc.h: Removed corresponding MATCH and MASK macros.
	* opcodes/riscv-opc.c: Implemented:
		* MASK_CV_MAC_UIMM5 macro which masks 0 for Is3 operand
		* infrastructure for CORE-V MAC alias instructions.
	* gas/testsuite/gas/riscv/cv-mac-mulhhs.d: Updated tests.
	* gas/testsuite/gas/riscv/cv-mac-mulhhs.s: Likewise.
	* gas/testsuite/gas/riscv/cv-mac-mulhhu.d: Likewise.
	* gas/testsuite/gas/riscv/cv-mac-mulhhu.s: Likewise.
	* gas/testsuite/gas/riscv/cv-mac-muls.d: Likewise.
	* gas/testsuite/gas/riscv/cv-mac-muls.s: Likewise.
	* gas/testsuite/gas/riscv/cv-mac-mulu.d: Likewise.
	* gas/testsuite/gas/riscv/cv-mac-mulu.s: Likewise.

Signed-off-by: Nandni Jamnadas <nandni.jamnadas@embecosm.com>