It is legal for an inline asm operand to use an earlyclobber register if the
use operand is tied to the earlyclobber operand. The issue is discussed here:

  http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html

We should perhaps let only the machine code verifier worry about these finer
details. EarlyClobber operands are not really interesting to the scavenger.

This fixes PR4528 for the third time.

llvm-svn: 79122

llvm-svn: 79121

trying to wrap strstr which is just too inconvenient.  Make it
use a StringRef to avoid ".c_str()" calls.

llvm-svn: 79120

llvm-svn: 79119

llvm-svn: 79118

llvm-svn: 79117

llvm-svn: 79116

llvm-svn: 79115

llvm-svn: 79114

llvm-svn: 79113

llvm-svn: 79112

is why they are datarel).  This should fix PR4724, and is fallout
from r78890.

llvm-svn: 79111

llvm-svn: 79110

llvm-svn: 79109

llvm-svn: 79107

llvm-svn: 79106

llvm-svn: 79105

llvm-svn: 79101

llvm-svn: 79098

PIC16DebugInfo currently rely on NameStr of composite type descriptors to uniquely
identify debug info for two aggregate type decls with same name.
This implementation will change when we have MDNodes based debug info implemenatation in place

llvm-svn: 79097

In a naked function, the flag is never set and getPristineRegs() returns an
empty list. That means naked functions are able to clobber callee saved
registers, but that is the whole point of naked functions.

This fixes PR4716.

llvm-svn: 79096

llvm-svn: 79095

llvm-svn: 79094

llvm-svn: 79093

llvm-svn: 79092

The Link Register is volatile when using the 32-bit SVR4 ABI.
Make it possible to use the 64-bit SVR4 ABI.
Add non-volatile registers for the 64-bit SVR4 ABI.
Make sure r2 is a reserved register when using the 64-bit SVR4 ABI.
Update PPCFrameInfo for the 64-bit SVR4 ABI.
Add FIXME for 64-bit Darwin PPC.
Insert NOP instruction after direct function calls.
Emit official procedure descriptors.
Create TOC entries for GlobalAddress references.
Spill 64-bit non-volatile registers to the correct slots.
Only custom lower VAARG when using the 32-bit SVR4 ABI.
Use simple VASTART lowering for the 64-bit SVR4 ABI.

llvm-svn: 79091

In the included test case, a stack load was not included in DistanceMap. That
caused TransferDeadness to ignore the instruction, leading to a scavenger
assert.

llvm-svn: 79090

llvm-svn: 79088

llvm-svn: 79087

llvm-svn: 79086

llvm-svn: 79084

llvm-svn: 79082

the class it defines.

llvm-svn: 79081

llvm-svn: 79080

support for globals going into the appropriate sections with the flags.

This hopefully finishes unbreaking the previous behavior that I broke before.

llvm-svn: 79079

them to null out the default section pointers.

llvm-svn: 79078

class which represents the XCore cp/dp section flags.  No functionality
change yet.

llvm-svn: 79077

llvm-svn: 79075

llvm-svn: 79074

llvm-svn: 79073