1. May 12, 2020
    • Sam Elliott's avatar
      [RISCV] Support Constant Pools in Load/Store Peephole · fe69dfeb
      Sam Elliott authored
      Summary:
      RISC-V uses a post-select peephole pass to optimise
      `(load/store (ADDI $reg, %lo(addr)), 0)` into `(load/store $reg, %lo(addr))`.
      This peephole wasn't firing for accesses to constant pools, which is how we
      materialise most floating point constants.
      
      This adds support for the constantpool case, which improves code generation for
      lots of small FP loading examples. I have not added any tests because this
      structure is well-covered by the `fp-imm.ll` testcases, as well as almost
      all other uses of floating point constants in the RISC-V backend tests.
      
      Reviewed By: luismarques, asb
      
      Differential Revision: https://reviews.llvm.org/D79523
      fe69dfeb
    • Hongtao Yu's avatar
      Properly add out-of-module functions to the import list · 47c1f274
      Hongtao Yu authored
      This patch addresses two issues related to adding inline functions to the import list while recursively going through the profiling data.
      1. For callsite samples, only add an inlined function to the import list if it's from outside of the module (i.e. only has a declaration inside the module).
      2. For body samples, add each target function to the import list if it's from outside of the module (i.e. only has a declaration inside the module). Previously we were using getSubProgram() to check whether it has dbg info, which is inaccurate. This fix properly add imports and could improve the quality of the pass.
      
      Added a few changes to the test to catch these cases.
      
      Differential Revision: https://reviews.llvm.org/D79379
      47c1f274
    • Vedant Kumar's avatar
      [lldb/test] Fix for flakiness in TestNSDictionarySynthetic · f807d0b4
      Vedant Kumar authored
      Summary:
      TestNSDictionarySynthetic sets up an NSURL which does not initialize its
      _baseURL member. When the test runs and we print out the NSURL, we print
      out some garbage memory pointed-to by the _baseURL member, like:
      
      ```
      _baseURL = 0x0800010020004029 @"d��qX"
      ```
      
      and this can cause a python unicode decoding error like:
      
      ```
      UnicodeDecodeError: 'utf8' codec can't decode byte 0xa0 in position
      10309: invalid start byte
      ```
      
      There's a discrepancy here because lldb's StringPrinter facility tries
      to only print out "printable" sequences (see: isprint32()), whereas python
      rejects the StringPrinter output as invalid utf8. For the specific error
      seen above, lldb's `isprint32(0xa0) = true`, even though 0xa0 is not
      really "printable" in the usual sense.
      
      The problem is that lldb and python disagree on what exactly is
      "printable". Both have dismayingly hand-rolled utf8 validation code
      (c.f. _Py_DecodeUTF8Ex), and I can't really tell which one is more
      correct.
      
      I tried replacing lldb's isprint32() with a call to libc's iswprint():
      this satisfied python, but broke emoji printing :|.
      
      Now, I believe that lldb (and python too) ought to just call into some
      battle-tested utf library, and that we shouldn't aim for compatibility
      with python's strict unicode decoding mode until then.
      
      FWIW I ran this test under an ASanified lldb hundreds of times but
      didn't turn up any other issues.
      
      rdar://62941711
      
      Reviewers: JDevlieghere, jingham, shafik
      
      Subscribers: lldb-commits
      
      Tags: #lldb
      
      Differential Revision: https://reviews.llvm.org/D79645
      f807d0b4
    • Julian Lettner's avatar
      [compile-rt] Reduce #ifdef noise for ptrauth · bba38de5
      Julian Lettner authored
      Create a sanitizer_ptrauth.h header that #includes <ptrauth> when
      available and defines just the required macros as "no ops" otherwise.
      This should avoid the need for excessive #ifdef'ing.
      
      Follow-up to and discussed in: https://reviews.llvm.org/D79132
      
      Reviewed By: delcypher
      
      Differential Revision: https://reviews.llvm.org/D79540
      bba38de5
    • LLVM GN Syncbot's avatar
      [gn build] Port bf95cf4a · e6615d71
      LLVM GN Syncbot authored
      e6615d71
    • Zola Bridges's avatar
      [x86][seses] Introduce SESES pass for LVI · bf95cf4a
      Zola Bridges authored
      This is an implementation of Speculative Execution Side Effect
      Suppression which is intended as a last resort mitigation against Load
      Value Injection, LVI, a newly disclosed speculative execution side
      channel vulnerability.
      
      One pager:
      https://software.intel.com/security-software-guidance/software-guidance/load-value-injection
      
      Deep dive:
      https://software.intel.com/security-software-guidance/insights/deep-dive-load-value-injection
      
      The mitigation consists of a compiler pass that inserts an LFENCE before
      each memory read instruction, memory write instruction, and the first
      branch instruction in a group of terminators at the end of a basic
      block. The goal is to prevent speculative execution, potentially based
      on misspeculated conditions and/or containing secret data, from leaking
      that data via side channels embedded in such instructions.
      
      This is something of a last-resort mitigation: it is expected to have
      extreme performance implications and it may not be a complete mitigation
      due to trying to enumerate side channels.
      
      In addition to the full version of the mitigation, this patch
      implements three flags to turn off part of the mitigation. These flags
      are disabled by default. The flags are not intended to result in a
      secure variant of the mitigation. The flags are intended to be used by
      users who would like to experiment with improving the performance of
      the mitigation. I ran benchmarks with each of these flags enabled in
      order to find if there was any room for further optimization of LFENCE
      placement with respect to LVI.
      
      Performance Testing Results
      
      When applying this mitigation to BoringSSL, we see the following
      results. These are a summary/aggregation of the performance changes when
      this mitigation is applied versus when no mitigation is applied.
      
      Fully Mitigated vs Baseline
      Geometric mean
      0.071 (Note: This can be read as the ops/s of the mitigated
      program was 7.1% of the ops/s of the unmitigated program.)
      Minimum
      0.041
      Quartile 1
      0.060
      Median
      0.063
      Quartile 3
      0.077
      Maximum
      0.230
      
      Reviewed By: george.burgess.iv
      
      Differential Revision: https://reviews.llvm.org/D75939
      bf95cf4a
    • Nicolas Vasilache's avatar
      [mlir] Simplify and better document std.view semantics · 6ed61a26
      Nicolas Vasilache authored
      This [discussion](https://llvm.discourse.group/t/viewop-isnt-expressive-enough/991/2) raised some concerns with ViewOp.
      
      In particular, the handling of offsets is incorrect and does not match the op description.
      Note that with an elemental type change, offsets cannot be part of the type in general because sizeof(srcType) != sizeof(dstType).
      
      Howerver, offset is a poorly chosen term for this purpose and is renamed to byte_shift.
      
      Additionally, for all intended purposes, trying to support non-identity layouts for this op does not bring expressive power but rather increases code complexity.
      
      This revision simplifies the existing semantics and implementation.
      This simplification effort is voluntarily restrictive and acts as a stepping stone towards supporting richer semantics: treat the non-common cases as YAGNI for now and reevaluate based on concrete use cases once a round of simplification occurred.
      
      Differential revision: https://reviews.llvm.org/D79541
      6ed61a26
    • Zola Bridges's avatar
      [llvm][utils] Remove git-svn folder + scripts · f056dacb
      Zola Bridges authored
      Summary:
      These tools are no longer useful since we've migrated off of SVN, so
      this patch deletes them.
      
      RFC Link: http://lists.llvm.org/pipermail/llvm-dev/2020-May/141386.html
      
      Unless there is opposition in the RFC thread, I'll submit the patch on
      May 10, 2020.
      
      I searched through the repo to confirm there were no mentions of the scripts
      in other scripts or documentation.
      
      Reviewed By: echristo, tstellar, MaskRay
      
      Differential Revision: https://reviews.llvm.org/D79348
      f056dacb
    • Kostya Kortchinsky's avatar
      Add vendor identity check for Hygon Dhyana processor in Scudo · 9959eb91
      Kostya Kortchinsky authored
      Summary:
      The Hygon Dhyana processor supports hardware CRC32.
      
      Related link:
      https://reviews.llvm.org/D78874
      
      Result of "make check":
      Testing Time: 1364.04s
        Unsupported Tests:   317
        Expected Passes  : 36802
        Expected Failures:   161
      [100%] Built target check-llvm
      [100%] Built target check
      
      Reviewers: cryptoad
      
      Reviewed By: cryptoad
      
      Subscribers: craig.topper, cryptoad, cfe-commits, #sanitizers, llvm-commits
      
      Tags: #clang, #sanitizers, #llvm
      
      Differential Revision: https://reviews.llvm.org/D62368
      9959eb91
    • LLVM GN Syncbot's avatar
      [gn build] Port 48fa355e · b02473d5
      LLVM GN Syncbot authored
      b02473d5
    • Mircea Trofin's avatar
      [llvm][NFC] Move inlining decision-related APIs in InliningAdvisor. · 48fa355e
      Mircea Trofin authored
      Summary: Factoring out in preparation to https://reviews.llvm.org/D79042
      
      Reviewers: dblaikie, davidxl
      
      Subscribers: mgorny, eraman, hiraditya, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D79613
      48fa355e
  2. May 11, 2020