- Feb 23, 2022
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Balazs Benics authored
This reverts commit b8ae323c. Let's try `REQUIRES: asserts`.
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Simon Moll authored
Separate vector isel functions to the module they belong to. Keep scalar stuff and calls into vector isel in the VEISelLowering.
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serge-sans-paille authored
accumulated preprocessed size: before: 1065515095 after: 1065629059 Discourse thread: https://discourse.llvm.org/t/include-what-you-use-include-cleanup Differential Revision: https://reviews.llvm.org/D120195
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Bill Wendling authored
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Bill Wendling authored
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Tobias Hieta authored
clang-cl doesn't support -target <target>, instead it only supports --target=<target> so building a RUNTIME configuration for clang-cl ended up in never building builtins. Which in turn lead to clang-cl not being able to find the runtime libraries because we depend on the compiler_rt.builtins.lib being in the runtime dir for the Driver to add it as a candidate. I don't think this should have any downsides since most the code these days are using --target=<target> instead of the old syntax. Reviewed By: mstorsjo Differential Revision: https://reviews.llvm.org/D120308
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Bill Wendling authored
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David Green authored
We have some recognition of SSAT and USAT from SELECT_CC at the moment. This extends the matching to SMIN/SMAX which can help catch more cases, either from min/max being the canonical form in instcombine or from some expanded nodes like fp_to_si_sat. Differential Revision: https://reviews.llvm.org/D119819
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Nikita Popov authored
This one-use limitation is artificial, we do not increase instruction count if we perform the fold with multiple uses. The motivating case is shown in @sub_eq_zero_select, where the one-use limitation causes us to miss a subsequent select fold. I believe the backend is pretty good about reusing flag-producing subs for cmps with same operands, so I think doing this is fine. Differential Revision: https://reviews.llvm.org/D120337
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Nathan James authored
The tristate is a little redundant as we can determine if the item was already in the cache based on the return from try_emplace. Reviewed By: salman-javed-nz Differential Revision: https://reviews.llvm.org/D120196
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Nathan James authored
Add support to the `isInline` matcher for C++17's inline variables. Reviewed By: aaron.ballman Differential Revision: https://reviews.llvm.org/D118900
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Chuanqi Xu authored
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Stanislav Gatev authored
This is part of the implementation of the dataflow analysis framework. See "[RFC] A dataflow analysis framework for Clang AST" on cfe-dev. Reviewed-by: ymandel, xazax.hun Differential Revision: https://reviews.llvm.org/D120149
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LLVM GN Syncbot authored
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Haojian Wu authored
This patch introduces a dense implementation of the LR parsing table, which is used by LR parsers. We build a SLR(1) parsing table from the LR(0) graph. Statistics of the LR parsing table on the C++ spec grammar: - number of states: 1449 - number of actions: 83069 - size of the table (bytes): 334928 Differential Revision: https://reviews.llvm.org/D118196
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Lian Wang authored
Supplement tests for some aliaes of gorci. RV32: add orc4.h/orc2.h in rv32zbp.ll add orc.h/orc16/orc8/orc4/orc2/orc in rv32zbp-intrinsic.ll RV64: add orc4.h/orc2.h in rv64zbp.ll add orc.h/orc32/orc16/orc8/orc4/orc2/orc/orc16.w/orc8.w/ orc4.w/orc2.w/orc.w in rv64zbp-intrinsic.ll Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D120388 -
Valentin Clement authored
This patch handles lowering of real constant. This patch is part of the upstreaming effort from fir-dev branch. Reviewed By: PeteSteinfeld Differential Revision: https://reviews.llvm.org/D120354 Co-authored-by:
Eric Schweitz <eschweitz@nvidia.com> Co-authored-by:
Jean Perier <jperier@nvidia.com>
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Lian Wang authored
Supplement tests for some aliaes of grevi. RV32: add rev4.h/rev2.h in rv32zbp.ll add rev/rev2/rev4/rev8/rev16 in rv32zbp-intrinsic.ll RV64: add rev4.h/rev2.h in rv64zbp.ll add rev.h/rev/rev2/rev4/rev8/rev16/rev32/rev.w/rev2.w/ rev4.w/rev8.w/rev16.w in rv64zbp-intrinsic.ll Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D120304 -
minglotus-6 authored
In places where `MaxNumPromotions` is used to allocated an array, bail out early to prevent allocating an array of length 0. Differential Revision: https://reviews.llvm.org/D120295
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Fangrui Song authored
Revert 251640ab which fixed the wrong thing. While here, add `2>&1 | count 0` to assert no warning from lib/DebugInfo/DWARF.
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Fangrui Song authored
The write may be racy if ThinLTO creates multiple `InProcessThinBackend` instances.
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Alex Lorenz authored
This patch extends compiler-rt's cmake config to build macOS builtins with both macOS and Mac Catalyst support. This is done by telling the compiler to emit macho files with two build version load commands. Differential Revision: https://reviews.llvm.org/D118875
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Fangrui Song authored
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Arthur Eubanks authored
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Joseph Huber authored
Summary: We don't need this static allocator to survive the entire file, the strings stored have a defined lifetime.
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Joseph Huber authored
Summary: This patch removes the error we recieve when attempting to extract offloading sections. We shouldn't consider this a failure because extracting bitcode isn't necessarily required.
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David Blaikie authored
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Philip Reames authored
It turns out that instcombine is smarter than I am, and several of these ended up folded for the wrong reasons.
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Amara Emerson authored
This reverts commit 55c181a6. The original commit I made was an old patch, mea culpa. Committing the right implementation with test case for the reported crash.
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Arthur Eubanks authored
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Alina Sbirlea authored
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Alina Sbirlea authored
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Philip Reames authored
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Fangrui Song authored
Note: on some architectures lik AArch64, the PC does not match compiler-rt/lib/sanitizer_common/sanitizer_coverage_libcdep_new.cpp:`__sanitizer_cov_trace_pc_guard`
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Stanislav Mekhanoshin authored
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Fangrui Song authored
Port the change to compiler-rt/lib/fuzzer/FuzzerTracePC.cpp . Update RISCV to use PC-2: this is coarse (C extension may be disabled) but sufficient for pure symbolization purpose. The commit is separate from D120362 so that bisecting/reverting is easier.
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Aart Bik authored
Reviewed By: bixia Differential Revision: https://reviews.llvm.org/D120347
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Philip Reames authored
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Fangrui Song authored
x86 uses offset 1 while most RISC architectures use offset 4. Check x86 first to prevent changes for new RISC architectures. Reviewed By: #sanitizers, vitalybuka Differential Revision: https://reviews.llvm.org/D120362
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Arthur Eubanks authored
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