Depositing value into the lowest byte/word is a common code pattern.
This patch improves the code generation for it to avoid redundant AND
and OR operations.

Xcode 14.3.1 seems to have dropped these flags so we are creating unit tests to reproduce the issue.

This reverts commit 199a0f9f.
Fixed the left-shift of signed integer which was causing UB.

Follow up to the discussion from #75258, and serves as an alternate
solution for #74670.

Set the location to Unknown for deduplicated / moved / materialized
constants by OperationFolder. This makes sure that the folded constants
don't end up with an arbitrary location of one of the original ops that
became it, and that hoisted ops don't confuse the stepping order.

Also, for consistency make the ZeroOp lowering switch on the ArmSMETileType,
rather than the element bit width.

Add missing constant propogation folder for SNegate, [Logical]Not.

Implement additional folding when !(!x) for all ops.

This helps for readability of lowered code into SPIR-V.

Part of work for #70704

This enum is used by dataflow analyses to indicate whether further
propagation is necessary to reach the fix point. Accidentally discarding
such a value will likely lead to propagation stopping early, leading to
incomplete or incorrect results. The most egregious example is the
duality between `join` on the analysis class, which triggers propagation
internally, and `join` on the lattice class that does not and expects
the caller to trigger it depending on the returned `ChangeResult`.

Each vector element is reduced independently, which is a form of
multi-reduction.

The plan is to allow for gradual lowering of multi-reduction that
results in fewer `gpu.shuffle` ops at the end:
1d `vector.multi_reduction` --> 1d `gpu.subgroup_reduce` --> smaller 1d
`gpu.subgroup_reduce` --> packed `gpu.shuffle` over i32

For example we can perform 2 independent f16 reductions with a series of
`gpu.shuffles` over i32, reducing the final number of `gpu.shuffles` by 2x.

Add SME2 MLA/MLS builtins.

…396)"

This reverts commit 8773c9be.

IR intrinsics were already defined, but no codegen support had been
added.

I extracted this code from our downstream. Some of it may have come from
https://repo.hca.bsc.es/gitlab/rferrer/llvm-epi/ originally.

This reverts commit 934b1099.

Buildbot failues on sanitizer-x86_64-linux-fast

This reverts commit 5992ce90.

Builtbot failures with expensive checks enabled.

Currently isGuaranteedNotToBeUndef() is the same as
isGuaranteedNotToBeUndefOrPoison(). This function is used in places
where we only care about undef (due to multi-use issues), not poison.

Make it more precise by only considering instructions that can create
undef (like loads or call), and ignore those that can only create
poison. In particular, we can ignore poison-generating flags.

This means that inferring more flags has less chance to pessimize other
transforms.

Add m_NNegZext() and m_SExtLike() matchers to make doing these kinds
of changes simpler in the future.

This patch enables the following builtins for SME2:
 - svld1, svld1_vnum
 - svldnt1, svldnt1_vnum
 - svst1, svst1_vnum
 - svstnt1, svstnt1_vnum

The AIX linker does not support the `--whole-archive` option, removing
the option if the OS is AIX.

---------

Co-authored-by: Mark Danial <mark.danial@ibm.com>

According to Intel SDE, ADCX reads CF and ADOX reads OF. `Uses` was
set to empty by accident, the bug was not exposed b/c compiler never
emits these instructions.

It is used for FLAT atomics as well as Global atomics.

Alive2 proof: https://alive2.llvm.org/ce/z/2P8gq-
This patch closes #73905

Handle one more case missed in ad37c8694e.

Enable and test 'rdynamic' flag

1. Simplify the variable name
2. Change HasOddOpcode to HasEvenOpcode b/c
  a. opcode of any 8-bit arithmetic instruction is even
  b. opcode of a 16/32/64-bit arithmetic instruction is usually
     odd, but it can be even sometimes, e.g. INC/DEC, ADCX/ADOX
  c. so that we can remove `let Opcode = o` for the mentioned corner
     cases.

Shufflevector semantics have changed so that poison mask elements
return poison rather than undef. Reflect this in the
canCreateUndefOrPoison() implementation.

- Adds a new +pc option to -mbranch-protection that will enable
  the use of PC as a diversifier in PAC branch protection code.

- When +pauth-lr is enabled (-march=armv9.5a+pauth-lr) in combination
  with -mbranch-protection=pac-ret+pc, the new 9.5-a instructions
  (pacibsppc, retaasppc, etc) are used.

Documentation for the relevant instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/



Co-authored-by: Lucas Prates <lucas.prates@arm.com>

Add assembly/disassembly support for the new PAuthLR instructions
introduced in Armv9.5-A:

- AUTIASPPC/AUTIBSPPC
- PACIASPPC/PACIBSPPC
- PACNBIASPPC/PACNBIBSPPC
- RETAASPPC/RETABSPPC
- PACM

Documentation for these instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2023-09/Base-Instructions/

This presents misleading and confusing output. If you have a function
defined at the beginning of an XCOFF object file, and you have a
function call to an external function, the function call disassembles as
a branch to the local function. That is,

`void f() { f(); g();}`

disassembles as 
>00000000 <.f>:
       0: 7c 08 02 a6   mflr 0
4: 94 21 ff c0 stwu 1, -64(1)
       8: 90 01 00 48   stw 0, 72(1)
      c: 4b ff ff f5   bl 0x0 <.f>
      10: 4b ff ff f1   bl 0x0 <.f> 

With this PR, the second call will display:

`10: 4b ff ff f1   bl 0x0 <.g>  `

Using -r can help, but you still get the confusing output:

>10: 4b ff ff f1   bl 0x0 <.f>
      00000010:  R_RBR        .g

Clearly I need my eyes checked, it wasn't linking to a non-existent
library at all, I had the name wrong.

I assumed since it was in the PR and seemed like a logical
library to have, it would exist, but only `...Common` exists.

Add fortran runtime libraries to flang-new on AIX

Co-authored-by: Mark Danial <mark.danial@ibm.com>