------------------------------------------------------------------------
r261206 | bhushan.attarde | 2016-02-18 17:23:28 +0530 (Thu, 18 Feb 2016) | 9 lines

[LLDB][MIPS] Provide CPU string to compiler for appropriate code generation for MIPS
    
    SUMMARY:
    This patch implements ArchSpec::GetClangTargetCPU() that provides string representing current architecture as a target CPU.
    This string is then passed to tools like clang so that they generate correct code for that target.
    
    Reviewers: clayborg, zturner
    Subscribers: mohit.bhakkad, sagar, jaydeep, lldb-commits
    Differential Revision: http://reviews.llvm.org/D17022
------------------------------------------------------------------------

llvm-svn: 271378

------------------------------------------------------------------------
r263621 | mohit.bhakkad | 2016-03-16 13:53:10 +0530 (Wed, 16 Mar 2016) | 9 lines

[ASAN] Add support for mips/mips64 android

Patch by Duane Sand

Reviewers: samsonov

Subscribers: duanesand, jaydeep, sagar, llvm-commits, filcab.

Differential Revision: http://reviews.llvm.org/D17883
------------------------------------------------------------------------

llvm-svn: 271372

[r260944] clang-tools-extra/test/Unit/lit.site.cfg.in: Prune on_clone. I guess it has been unused since r188006.

llvm-svn: 271354

------------------------------------------------------------------------
r261139 | deadalnix | 2016-02-17 11:21:28 -0800 (Wed, 17 Feb 2016) | 10 lines

Fix load alignement when unpacking aggregates structs

Summary: Store and loads unpacked by instcombine do not always have the
right alignement. This explicitely compute the alignement and set it.

Reviewers: dblaikie, majnemer, reames, hfinkel, joker.eph

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D17326

------------------------------------------------------------------------

llvm-svn: 271230

------------------------------------------------------------------------
r270550 | rafael | 2016-05-24 12:16:14 +0100 (Tue, 24 May 2016) | 1 line

Update for llvm change.
------------------------------------------------------------------------
The referenced llvm change was r270542.

llvm-svn: 271223

------------------------------------------------------------------------
r266438 | niravd | 2016-04-15 08:01:38 -0700 (Fri, 15 Apr 2016) | 15 lines

Fix typing on generated LXV2DX/STXV2DX instructions

[PPC] Previously when casting generic loads to LXV2DX/ST instructions we
would leave the original load return type in place allowing for an
assertion failure when we merge two equivalent LXV2DX nodes with
different types.

This fixes PR27350.

Reviewers: nemanjai

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D19133

------------------------------------------------------------------------

llvm-svn: 271217

------------------------------------------------------------------------
r266217 | niravd | 2016-04-13 10:27:26 -0700 (Wed, 13 Apr 2016) | 12 lines

Cleanup Store Merging in UseAA case

This patch fixes a bug (PR26827) when using anti-aliasing in store
merging. This sets the chain users of the component stores to point to
the new store instead of the component stores chain parent.

Reviewers: jyknight

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18909

------------------------------------------------------------------------

llvm-svn: 271216

------------------------------------------------------------------------
r263428 | zbuljan | 2016-03-14 12:50:23 +0000 (Mon, 14 Mar 2016) | 3 lines

[mips] Fix an issue with long double when function roundl is defined
Differential Revision: http://reviews.llvm.org/D17760

------------------------------------------------------------------------

llvm-svn: 271127

------------------------------------------------------------------------
r262230 | vkalintiris | 2016-02-29 15:58:12 +0000 (Mon, 29 Feb 2016) | 7 lines

[mips] Do not use SLL for ANY_EXTEND nodes as the high bits are undefined.

Reviewers: dsanders

Subscribers: dsanders, llvm-commits

Differential Revision: http://reviews.llvm.org/D15420
------------------------------------------------------------------------

llvm-svn: 271126

------------------------------------------------------------------------
r268386 | dsanders | 2016-05-03 15:19:26 +0100 (Tue, 03 May 2016) | 11 lines

[mips][fastisel] ADJCALLSTACKUP has a second immediate operand.

Summary:
It's always zero for SelectionDAG and is never read by the MIPS backend so
do the same for FastISel.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D19863
------------------------------------------------------------------------

llvm-svn: 271124

------------------------------------------------------------------------
r268053 | sdardis | 2016-04-29 17:07:47 +0100 (Fri, 29 Apr 2016) | 9 lines

[mips][FastISel] A store is not a load.

Correct trivial error. One of the failing tests from PR/27458.

Reviewers: dsanders, vkalintiris, mcrosier

Differential Review: http://reviews.llvm.org/D19726


------------------------------------------------------------------------

llvm-svn: 271123

------------------------------------------------------------------------
r259039 | zjovanovic | 2016-01-28 11:08:03 +0000 (Thu, 28 Jan 2016) | 9 lines

[mips][microMIPS] Disable FastISel for microMIPS

Author: milena.vujosevic.janicic
Reviewers: dsanders

FastIsel is not supported for microMIPS, thus it needs to be disabled. 
Test micromips-zero-mat-uses.ll is deleted since the tested sequence of instructions is not generated for microMIPS without FastISel.
Differential Revision: http://reviews.llvm.org/D15892

------------------------------------------------------------------------

llvm-svn: 271122

------------------------------------------------------------------------
r268673 | koriakin | 2016-05-05 21:13:17 +0100 (Thu, 05 May 2016) | 5 lines

[MSan] [MIPS64] Fix vararg helper for >1 fixed argument.

This fixes http://llvm.org/PR27646 on Mips64.

Differential Revision: http://reviews.llvm.org/D19989
------------------------------------------------------------------------

llvm-svn: 271121

------------------------------------------------------------------------
r268531 | koriakin | 2016-05-04 19:39:14 +0100 (Wed, 04 May 2016) | 3 lines

[MSan] [Mips64] Add tests for vararg handling.

Differential Revision: http://reviews.llvm.org/D19919
------------------------------------------------------------------------

llvm-svn: 271120

------------------------------------------------------------------------
r266833 | koriakin | 2016-04-20 00:46:59 +0100 (Wed, 20 Apr 2016) | 5 lines

[Mips] [MSan] VarArgMIPS64Helper: Use target's endian, not host's.

Ugh.

Differential Revision: http://reviews.llvm.org/D19292
------------------------------------------------------------------------

llvm-svn: 271119

------------------------------------------------------------------------
r270542 | slthakur | 2016-05-24 15:27:10 +0530 (Tue, 24 May 2016) | 9 lines

[MIPS][LLVM-MC] Fix Disassemble of Negative Offset

Patch by Nitesh Jain.

Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added.

Reviewers: dsanders, vkalintiris
Differential Revision: http://reviews.llvm.org/D17540

------------------------------------------------------------------------

llvm-svn: 270676

------------------------------------------------------------------------
r265134 | slthakur | 2016-04-01 17:25:33 +0530 (Fri, 01 Apr 2016) | 9 lines

[MIPS][LLVM-MC] Fix JR encoding for MIPSR6 ISA

Summary: The assembler was picking the wrong JR variant because the pre-R6 one was still enabled at R6.

Author: nitesh.jain
Reviewers: vkalintiris, dsanders
Subscribers: dsanders, llvm-commits, mohit.bhakkad, sagar, bhushan, jaydeep
Differential: D18387

------------------------------------------------------------------------

llvm-svn: 270675

------------------------------------------------------------------------

llvm-svn: 270673

------------------------------------------------------------------------
r269882 | slthakur | 2016-05-18 11:39:26 +0530 (Wed, 18 May 2016) | 7 lines

[LSAN] Fix test swapcontext.cc on MIPS

There is no frame validity check in the slow unwinder like there is in the fast unwinder due to which lsan reports a leak even for heap allocated coroutine in the test swapcontext.cc. Since mips/linux uses slow unwindwer instead of fast unwinder, the test fails for mips/linux. Therefore adding the checks before unwinding fixes the test for mips/linux.

Reviewed by aizatsky.
Differential: http://reviews.llvm.org/D19961

------------------------------------------------------------------------

llvm-svn: 270672

------------------------------------------------------------------------
r267674 | mohit.bhakkad | 2016-04-27 11:19:42 +0530 (Wed, 27 Apr 2016) | 7 lines

[Compiler-rt][CFI] Enabling CFI for MIPS64

Reviewers: eugenis

Subscribers: jaydeep, sagar, Sanitizers

Differential Revision: http://reviews.llvm.org/D19531
------------------------------------------------------------------------

llvm-svn: 270668

------------------------------------------------------------------------
r262838 | joerg | 2016-03-07 18:19:15 +0100 (Mon, 07 Mar 2016) | 2 lines

Implement __builtin_eh_return_data_regno for SPARC and SPARC64.

------------------------------------------------------------------------

llvm-svn: 270602

------------------------------------------------------------------------
r261980 | slthakur | 2016-02-26 11:26:54 +0530 (Fri, 26 Feb 2016) | 8 lines

[MSAN] Fix test SmallPreAllocatedStackThread for MIPS

Summary: Msan was intercepting version 2.1 of the pthread_create function which was making it to crash in libc because __pthread_create_2_1 modifies the stack attributes of the thread. Intercepting the correct version fixes the test SmallPreAllocatedStackThread.

Reviewers: eugenis, samsonov
Subscribers: llvm-commits, mohit.bhakkad, jaydeep
Differential: http://reviews.llvm.org/D17603

------------------------------------------------------------------------

llvm-svn: 270549

------------------------------------------------------------------------
r264030 | mohit.bhakkad | 2016-03-22 13:38:02 +0530 (Tue, 22 Mar 2016) | 6 lines

[LLDB]{MIPS] Fix TestPlatformProcessConnect.py
Patch by Nitesh Jain

Reviewers: clayborg, labath.
Subscribers: jaydeep, bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D18082
------------------------------------------------------------------------

llvm-svn: 270546

------------------------------------------------------------------------
r262819 | mohit.bhakkad | 2016-03-07 14:42:49 +0530 (Mon, 07 Mar 2016) | 7 lines

[LLDB][MIPS] Fix TestDisassembleBreakpoint

Patch by Nitesh Jain

Reviewers: clayborg, jaydeep.
Subscribers: bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D17597
------------------------------------------------------------------------

llvm-svn: 270545

------------------------------------------------------------------------
r260362 | mohit.bhakkad | 2016-02-10 12:28:13 +0530 (Wed, 10 Feb 2016) | 6 lines

[LLDB][MIPS] Generalise MIPS arch names
Patch by Nitesh Jain

Reviewers: clayborg, jaydeep.
Subscribers: zturner, bhushan, mohit.bhakkad, sagar, lldb-commits.
Differential Revision: http://reviews.llvm.org/D16840
------------------------------------------------------------------------

llvm-svn: 270544

------------------------------------------------------------------------
r263218 | mohit.bhakkad | 2016-03-11 16:21:03 +0530 (Fri, 11 Mar 2016) | 7 lines

[Sanitizer][MIPS] internal lstat and fstat for mips64

Reviewers: dvyukov

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D18078
------------------------------------------------------------------------

llvm-svn: 270407

------------------------------------------------------------------------
r263001 | mohit.bhakkad | 2016-03-09 13:30:37 +0530 (Wed, 09 Mar 2016) | 7 lines

[DFSan] Fix test_inet_pton for big endian archs

Reviewers: samsonov

Subscribers: ed, jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17751
------------------------------------------------------------------------

llvm-svn: 270406

------------------------------------------------------------------------
r262303 | mohit.bhakkad | 2016-03-01 11:26:33 +0530 (Tue, 01 Mar 2016) | 7 lines

[Compiler-rt][MIPS] Correct Dynamic Thread Vector offset for MIPS

Reviewers: samsonov

Subscribers: dsanders, jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17703
------------------------------------------------------------------------

llvm-svn: 270405

------------------------------------------------------------------------
r262690 | mohit.bhakkad | 2016-03-04 11:45:59 +0530 (Fri, 04 Mar 2016) | 7 lines

[Compiler-rt][safestack] Enable for MIPS

Reviewers: samsonov

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17846
------------------------------------------------------------------------

llvm-svn: 270404

------------------------------------------------------------------------
r262209 | mohit.bhakkad | 2016-02-29 13:52:55 +0530 (Mon, 29 Feb 2016) | 1 line

Update the link of issue
------------------------------------------------------------------------

llvm-svn: 270403

------------------------------------------------------------------------
r262302 | mohit.bhakkad | 2016-03-01 11:23:30 +0530 (Tue, 01 Mar 2016) | 7 lines

[Compiler-rt][MSan] fix param_tls_limit test for platforms where big arguments are sliced in smaller ones

Reviewers: eugenis

Subscribers: dsanders, jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17129
------------------------------------------------------------------------

llvm-svn: 270402

------------------------------------------------------------------------
r261982 | mohit.bhakkad | 2016-02-26 12:14:10 +0530 (Fri, 26 Feb 2016) | 8 lines

[MSan] Endianness should not matter while printing a byte

Reviewers: eugenis

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17264
Differential Revision: http://reviews.llvm.org/D17563
------------------------------------------------------------------------

llvm-svn: 270400

------------------------------------------------------------------------
r261837 | mohit.bhakkad | 2016-02-25 13:37:44 +0530 (Thu, 25 Feb 2016) | 7 lines

[Compiler-rt][MSan]Fix shmat testcase: Pass SHMLBA-alligned address to shmat

Reviewers: samsonov

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17262
------------------------------------------------------------------------

llvm-svn: 270399

------------------------------------------------------------------------
r261723 | mohit.bhakkad | 2016-02-24 13:44:41 +0530 (Wed, 24 Feb 2016) | 7 lines

[MSan] fix process_vm_readv test: Exit silently if syscall is not implemeted

Reviewers: eugenis

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17560
------------------------------------------------------------------------

llvm-svn: 270398

------------------------------------------------------------------------
r261721 | mohit.bhakkad | 2016-02-24 12:38:33 +0530 (Wed, 24 Feb 2016) | 7 lines

[MSan] Mark dlerror.cc expected failure for MIPS

Reviewers: samsonov

Subscribers: jaydeep, sagar, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D17503
------------------------------------------------------------------------

llvm-svn: 270397

------------------------------------------------------------------------
r261513 | mohit.bhakkad | 2016-02-22 11:46:28 +0530 (Mon, 22 Feb 2016) | 7 lines

[MSan] Make unaligned load/store functions compatible for both endians

Reviewers: eugenis

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17371
------------------------------------------------------------------------

llvm-svn: 270396

------------------------------------------------------------------------
r263199 | mohit.bhakkad | 2016-03-11 05:57:20 +0000 (Fri, 11 Mar 2016) | 7 lines

[Compiler-rt] Fix ioctl codes for MIPS in sanitizer_ioctl_test

Reviewers: samsonov

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17985
------------------------------------------------------------------------

llvm-svn: 270362

------------------------------------------------------------------------
r263000 | mohit.bhakkad | 2016-03-09 07:57:20 +0000 (Wed, 09 Mar 2016) | 7 lines

[Compiler-rt][MIPS] Defining macros for MIPS archs

Reviewers: samsonov

Subscribers: filcab, jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17881
------------------------------------------------------------------------

llvm-svn: 270361

------------------------------------------------------------------------
r262581 | mohit.bhakkad | 2016-03-03 05:05:20 +0000 (Thu, 03 Mar 2016) | 7 lines

[LSan] Enable use_registers test for MIPS

Reviewers: samsonov

Subscribers: jaydeep, sagar, llvm-commits

Differential Revision: http://reviews.llvm.org/D17797
------------------------------------------------------------------------

llvm-svn: 270360

------------------------------------------------------------------------
r269676 | mkuper | 2016-05-16 11:27:00 -0700 (Mon, 16 May 2016) | 14 lines

[X86] Remove transformVSELECTtoBlendVECTOR_SHUFFLE

The new X86 shuffle lowering can do just fine without transforming vselects
into vector_shuffles. It looks like the only thing this code does right now
is cause trouble - in particular, it can lead to combine/legalization infinite
loops.

Note that it's not completely NFC, since some of the shuffle masks get inverted,
which may cause slight differences further down the line. We may want to find
a way to invert those masks, but that's orthogonal to this commit.

This fixes the hang in PR27689.

------------------------------------------------------------------------

llvm-svn: 270146