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r195535 | mren | 2013-11-22 17:16:29 -0800 (Fri, 22 Nov 2013) | 8 lines

Debug Info: update testing cases to specify the debug info version number.

We are going to drop debug info without a version number or with a different
version number, to make sure we don't crash when we see bitcode files with
different debug info metadata format.

Make tests more robust by removing hard-coded metadata numbers in CHECK lines.

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llvm-svn: 196817

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r195505 | mren | 2013-11-22 14:06:31 -0800 (Fri, 22 Nov 2013) | 8 lines

Debug Info: move StripDebugInfo from StripSymbols.cpp to DebugInfo.cpp.

We can share the implementation between StripSymbols and dropping debug info
for metadata versions that do not match.

Also update the comments to match the implementation. A follow-on patch will
drop the "Debug Info Version" module flag in StripDebugInfo.

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llvm-svn: 196816

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r195504 | mren | 2013-11-22 13:49:45 -0800 (Fri, 22 Nov 2013) | 6 lines

Debug Info: update testing cases to specify the debug info version number.

We are going to drop debug info without a version number or with a different
version number, to make sure we don't crash when we see bitcode files with
different debug info metadata format.

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llvm-svn: 196815

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r195495 | mren | 2013-11-22 11:42:45 -0800 (Fri, 22 Nov 2013) | 5 lines

Debug Info: add a "Debug Info Version" module flag to output the current debug
info version number.

Will error out when modules have different version numbers.

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llvm-svn: 196812

llvm-svn: 196810

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r196599 | zaks | 2013-12-06 11:28:16 -0800 (Fri, 06 Dec 2013) | 5 lines

Fixup to r196593.

This is another regression fixed by reverting r189090.

In this case, the problem is not live variables but the approach that was taken in r189090. This regression was caused by explicitly binding "true" to the condition when we take the true branch. Normally that's okay, but in this case we're planning to reuse that condition as the value of the expression.
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llvm-svn: 196796

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r196593 | zaks | 2013-12-06 10:56:29 -0800 (Fri, 06 Dec 2013) | 7 lines

Revert "[analyzer] Refactor conditional expression evaluating code"

This reverts commit r189090.

The original patch introduced regressions (see the added live-variables.* tests). The patch depends on the correctness of live variable analyses, which are not computed correctly. I've opened PR18159 to track the proper resolution to this problem.

The patch was a stepping block to r189746. This is why part of the patch reverts temporary destructor tests that started crashing. The temporary destructors feature is disabled by default.
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llvm-svn: 196795

failures.

llvm-svn: 196774

should fix the issue.
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r196210 | haoliu | 2013-12-03 06:06:55 +0000 (Tue, 03 Dec 2013) | 3 lines

[AArch64]Add missing floating point convert, round and misc intrinsics.
E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn

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llvm-svn: 196772

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r196725 | tnorthover | 2013-12-08 15:56:50 +0000 (Sun, 08 Dec 2013) |
19 lines

ARM: fix folding of stack-adjustment (yet again).

When trying to eliminate an "sub sp, sp, #N" instruction by folding
it into an existing push/pop using dummy registers, we need to account
for the fact that this might affect precisely how "fp" gets set in the
prologue.

We were attempting this, but assuming that *whenever* we performed a
fold it would make a difference. This is false, for example, in:
    push {r4, r7, lr}
    add fp, sp, #4
    vpush {d8}
    sub sp, sp, #8

we can fold the "sub" into the "vpush", forming "vpush {d7, d8}".
However, in that case the "add fp" instruction mustn't change, which
we were getting wrong before.

Should fix PR18160.
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llvm-svn: 196769

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r196751 | venkatra | 2013-12-08 20:02:15 -0800 (Sun, 08 Dec 2013) | 3 lines

[Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.


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llvm-svn: 196766

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r196755 | venkatra | 2013-12-08 21:13:25 -0800 (Sun, 08 Dec 2013) | 2 lines

[SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.

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llvm-svn: 196764

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llvm-svn: 196761

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r195494 | mren | 2013-11-22 11:41:59 -0800 (Fri, 22 Nov 2013) | 4 lines

Debug Info: add a constant for debug info version number.

This will be used to output the debug info version number as a module flag.

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llvm-svn: 196760

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r196720 | joerg | 2013-12-08 05:54:58 -0800 (Sun, 08 Dec 2013) | 3 lines

Extend assembler handling for NetBSD/MIPS to pass down the correct ABI,
architecture and PIC flag.

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llvm-svn: 196747

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r196724 | tnorthover | 2013-12-08 07:24:55 -0800 (Sun, 08 Dec 2013) | 5 lines

ARM: teach Sema that "r" can match 64-bit values

We already support using "r" on 64-bit values (a GPRPair is
allocated), but Sema doesn't know this yet so issues a warning. This
should fix it.
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llvm-svn: 196746

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r196712 | rafael | 2013-12-07 17:13:22 -0800 (Sat, 07 Dec 2013) | 12 lines

Fix pr18174.

Clang outputs LLVM one top level decl at a time. This combined with the
visibility computation code looking for the newest NamespaceDecl would cause
it to produce different results for nested namespaces.

The two options for producing consistent results are
* Delay codegen of anything inside a namespace until the end of the file.
* Don't look for the newest NamespaceDecl.

This patch implements the second option.
This matches the gcc behavior too.
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llvm-svn: 196745

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r196735 | venkatra | 2013-12-08 14:06:07 -0800 (Sun, 08 Dec 2013) | 3 lines

[SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.
  This fixes PR18150.

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llvm-svn: 196744

function.

llvm-svn: 196717

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r196638 | arsenm | 2013-12-06 18:58:45 -0800 (Fri, 06 Dec 2013) | 1 line

Fix assert with copy from global through addrspacecast
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llvm-svn: 196709

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llvm-svn: 196708

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r196637 | arsenm | 2013-12-06 18:58:41 -0800 (Fri, 06 Dec 2013) | 1 line

Add getBitCastOrAddrSpaceCast
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llvm-svn: 196707

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r196630 | joerg | 2013-12-06 16:57:46 -0800 (Fri, 06 Dec 2013) | 3 lines

Pass correct flags to assembler and linker for OpenBSD on AMD64, PowerPC
and MIPS64. From Brad Smith.

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llvm-svn: 196706

U    lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
U    test/Transforms/InstCombine/addrspacecast.ll

llvm-svn: 196705

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r196588 | weimingz | 2013-12-06 09:56:48 -0800 (Fri, 06 Dec 2013) | 7 lines

Bug 18149: [AArch32] VSel instructions has no ARMCC field

The current peephole optimizing for compare inst assumes an instr that
uses CPSR has an MO for ARM Cond code.However, for VSEL instructions
(vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do
they support the modification of Cond Code.

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llvm-svn: 196704

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llvm-svn: 196703

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llvm-svn: 196702

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r196533 | apazos | 2013-12-05 13:07:49 -0800 (Thu, 05 Dec 2013) | 3 lines

Implemented vget/vset_lane_f16 intrinsics


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llvm-svn: 196701

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r196456 | jiangning | 2013-12-04 18:12:01 -0800 (Wed, 04 Dec 2013) | 2 lines

For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64.

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llvm-svn: 196700

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r196362 | kevinqin | 2013-12-04 00:02:34 -0800 (Wed, 04 Dec 2013) | 1 line

[AArch64 Neon] Add ACLE intrinsic vceqz_f64.
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llvm-svn: 196699

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llvm-svn: 196698

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r196360 | kevinqin | 2013-12-03 23:53:28 -0800 (Tue, 03 Dec 2013) | 1 line

[AArch64 NEON] Add missing compare intrinsics.
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llvm-svn: 196697

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llvm-svn: 196696

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llvm-svn: 196695

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llvm-svn: 196694

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r196208 | haoliu | 2013-12-02 21:58:30 -0800 (Mon, 02 Dec 2013) | 3 lines

AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions.
E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm.

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llvm-svn: 196693

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llvm-svn: 196692

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r196198 | haoliu | 2013-12-02 19:39:47 -0800 (Mon, 02 Dec 2013) | 3 lines

AArch64: Add missing scalar pair intrinsics.
E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s".

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llvm-svn: 196691

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r196192 | jiangning | 2013-12-02 17:33:52 -0800 (Mon, 02 Dec 2013) | 2 lines

Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends.

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llvm-svn: 196690

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llvm-svn: 196689