- Dec 01, 2022
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Shoaib Meenai authored
check-profile needs llvm-cov and llvm-profdata. Reviewed By: phosek Differential Revision: https://reviews.llvm.org/D138968
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Shoaib Meenai authored
The sub-component check targets won't be automatically created until the runtime configurations have run (and the main LLVM configure has rerun afterwards). Work around this by creating check- targets for components in LLVM_RUNTIME_DISTRIBUTION_COMPONENTS as well (and making sure they get the proper test dependencies). Reviewed By: phosek Differential Revision: https://reviews.llvm.org/D138967
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Shoaib Meenai authored
Right now, sub-components are only accounted for when the runtime has been configured and the main LLVM configure is rerun after that. We can make use of LLVM_RUNTIME_DISTRIBUTION_COMPONENTS to make sub-component targets available from the start, but that currently clashes with the sub-component target generation once they are picked up. Make sure we don't create duplicate targets; an analogous check already exists in runtime_default_target. Reviewed By: phosek Differential Revision: https://reviews.llvm.org/D138966
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Shoaib Meenai authored
We were previously naming sub-component stripped install targets as `install-${component}-stripped-${triple}`, whereas everywhere else names them `install-${component}-${triple}-stripped`. This inconsistency would cause issues when LLVM_RUNTIME_DISTRIBUTION_COMPONENTS contained a sub-component (which I'm addding support for next). Reviewed By: phosek, #libc, #libc_abi, ldionne Differential Revision: https://reviews.llvm.org/D138965 -
Sanjay Patel authored
This reverts commit a4c46676. This broke clang tests that are wrongly dependent on the optimizer.
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Michael Maitland authored
It is likley that subtargets act differently for vector floating-point instructions based on the LMUL. This patch creates seperate SchedRead, SchedWrite, WriteRes, ReadAdvance for each relevant LMUL. Differential Revision: https://reviews.llvm.org/D137426
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Philip Reames authored
This was requested by a reviewer in D138926.
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serge-sans-paille authored
Hey folks, I recently moved from Redhat to Mozilla, still working on compiler / build issues. I'd like to both - resign as a member of Redhat - apply as a member of Mozilla Mozilla's mission makes it very sensible to compiler security flags, so it makes sense (at least to me) to have it represented in the group. Although I've been a discrete member of group, I'm still actively dealing with some security-related patches [0] and blogging about it [1,2] [0] https://reviews.llvm.org/D137707 [1] https://developers.redhat.com/articles/2022/06/02/use-compiler-flags-stack-protection-gcc-and-clang [2] https://developers.redhat.com/articles/2022/09/29/benefits-limitations-flexible-array-members Differential Revision: https://reviews.llvm.org/D138898
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Momchil Velikov authored
Deleting a fully specialised function left dangling pointers in `FunctionAnalysisManager`, which causes an internal compiler error when the function's storage was reused. Fixes bug #58759. Reviewed By: ChuanqiXu Differential Revision: https://reviews.llvm.org/D138909 Change-Id: Ifed378c748af35e8fe7dcbdddb0f41b8777cbe87
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Philip Reames authored
Note that we have to now pass alignment to that callsite because the wrapper previously did that for us for fixed offsets.
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Craig Topper authored
Similar to previous patches for ADDI/ADDIW/SLLI/ADD, but restricted to only cases where the register is x8-x15(GPRC reg class). I've restricted it so that we can be precise about whether the resulting instruction would be compressible. Changing the register allocation may make some other instruction not compressible so we should try to be accurate. Reviewed By: asb Differential Revision: https://reviews.llvm.org/D138740
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yijiagu authored
This change adds async_funcs_only option to AsyncToAsyncRuntimePass. The goal is to convert async functions to regular functions in early stages of compilation pipeline. Differential Revision: https://reviews.llvm.org/D138611
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Sanjay Patel authored
This is the main patch for converting a truncated scalar that is inserted into a vector to bitcast+shuffle. We could go either way on patterns like this, but this direction will allow collapsing a pair of these sequences on the motivating example from issue The patch is split into 3 parts to make it easier to see the progression of tests diffs. We allow inserting/shuffling into a different size vector for flexibility, so there are several test variations. The length-changing is handled by shortening/padding the shuffle mask with undef elements. In part 1, handle the basic pattern: inselt undef, (trunc T), IndexC --> shuffle (bitcast T), IdentityMask Proof for the endian-dependency behaving as expected: https://alive2.llvm.org/ce/z/BsA7yC The TODO items for handling shifts and insert into an arbitrary base vector value are implemented as follow-ups. Differential Revision: https://reviews.llvm.org/D138872
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Thurston Dang authored
D137666 changed the memory mappings for msan on aarch64. This patch updates two more tests to match the new mappings. Differential Revision: https://reviews.llvm.org/D139033
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Philip Reames authored
After ac1ec9e2, the version with the StackOffset param has a strict superset of behavior. As a result, we can switch callers to use it, and then inline the other version into the now-single caller.
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Jay Foad authored
Don't bother pre-shrinking "s_cmp_lg_u32 reg, 0" to s_cmpk_lg_u32 because 0 is already an inline constant so the s_cmpk form is no smaller. This is just for consistency with the surrounding code and to simplify a downstream patch. Differential Revision: https://reviews.llvm.org/D138993
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Valentin Clement authored
Pointer association with an unlimited polymorphic pointer on the lhs requires more than just updating the base_addr. Delegate the association to the runtime function `PointerAssociation`. Reviewed By: PeteSteinfeld Differential Revision: https://reviews.llvm.org/D139019
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Philip Reames authored
Differential Revision: https://reviews.llvm.org/D138926
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Thurston Dang authored
strlen_of_shadow hardcodes the mem-to-shadow constant. That constant was changed in D137666; this CL updates the test accordingly. (Other tests will be updated separately.) Differential Revision: https://reviews.llvm.org/D139027
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Lei Zhang authored
This commit extends the `ResourceLimitsAttr` to support specifying a minimal and maximal subgroup size, and extends `EntryPointABIAttr` to support specifying the requested subgroup size. This is possible now in Vulkan with the VK_EXT_subgroup_size_control extension. For OpenCL it's possible to use the `SubgroupSize` execution mode directly. Reviewed By: ThomasRaoux Differential Revision: https://reviews.llvm.org/D138962
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Philip Reames authored
This reuses the existing optimized implementation of adjustReg, and commons up code. This has the effect of enabling two code changes for the new caller. First, we enable the "split andi" lowering (with no alignment requirement), and second we use a sub with smaller constant in register instead of a add with negative constant in register. Differential Revision: https://reviews.llvm.org/D132839
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Sam McCall authored
Requiring everything that wants to match Includes to depend on Record is weird. This isn't lightweight enough that it feels perfect in Types, could be its own header instead. But pragmatically it doesn't add bad deps, and is widely used. Differential Revision: https://reviews.llvm.org/D139014
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Sam McCall authored
This is needed to accurately remove headers with tooling::IncludeHeaders in the rare cases where <foo> and "foo" resolve to something different. This is also nice to have in HTML report and command-line -print=changes output. Differential Revision: https://reviews.llvm.org/D139018
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eopXD authored
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Florian Hahn authored
This reverts commit bf15f1e4. The updated version fixes a crash by checking the induction kind instead of the opcode; for integer inductions, the step is always added, but the opcode might not be set.
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Archibald Elliott authored
D137836 changed what llvm::get_physical_cores returns when threads are disabled, to bring it inline with the other parts of Threading. It now returns the value for "unknown" when threading is disabled. This commit updates the tests (which are failing on some platforms), to also reflect this change. Differential Revision: https://reviews.llvm.org/D139015
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Kazu Hirata authored
This patch fixes: mlir/lib/Dialect/Vector/IR/VectorOps.cpp:1751:13: error: unused function 'allBitsSet' [-Werror,-Wunused-function]
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Kazu Hirata authored
This patch fixes: clang/lib/Basic/SourceManager.cpp:1292:19: error: comparison of integers of different signs: 'long' and 'unsigned long' [-Werror,-Wsign-compare]
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Florian Hahn authored
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eopXD authored
According to version_macro.adoc under rvv-intrinsic-doc, the compiler should have a macro to imply such availability. Link: https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/version_macro.adoc Reviewed By: kito-cheng, asb Differential Revision: https://reviews.llvm.org/D138930
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Amy Wang authored
[MLIR][Transform] Consolidate the transform ops of get_parent_for and loop unroll from affine and scf dialects. This patch consolidates the two transform ops from the affine dialect and the scf dialect to avoid code duplication. This is to address the review comments from https://reviews.llvm.org/D137997. The transform ops directory / file structure for the affine dialect is kept for the purpose of forth-coming transform ops for affine, but get_parent_for and unroll are removed. Reviewed By: nicolasvasilache Differential Revision: https://reviews.llvm.org/D138980
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Jakub Kuderski authored
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- Nov 30, 2022
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Tue Ly authored
Use built-in sub_with_borrow to improve the performance of subtraction for UInt<>. Microbenchmark: https://quick-bench.com/q/UEg6Z6VK4PP2yLBtTi9C0cL9xpY Reviewed By: sivachandra Differential Revision: https://reviews.llvm.org/D138506
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Joseph Huber authored
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Qiongsi Wu authored
This patch enables context sensitive PGO (CSPGO) for LTO on AIX. Two parts are involved: # Frontend logic is added so libLTO can understand the CSPGO related options. # Two options are added to the backend so that the LTOCodeGenerator can understand the CSPGO related options and make use of them. Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D138854
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Florian Hahn authored
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Philip Reames authored
At the IR level, we generally assume that constants are free to materialize. However, for RISCV due to some quirks of the ISA, materializing arbitrary constants can be rather expensive. We frequently fallback to constant pool loads. We've been slowly moving in the direction of modeling the cost of the remat as part of the instruction cost. This has the effect of disincentivizing vectorization - mostly SLP - when we'd have to materialize an expensive constant. We need better modeling of which constants are expensive and not, but the moment let's be consistent with how we model arithmetic and memory instructions. The difference between the two is that arithmetic can sometimes fold a splat operation which stores can not. Differential Revision: https://reviews.llvm.org/D138941
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Paul Robinson authored
Incorrect REQUIRES clause. Also fixed the incorrect 'opt' line and removed a redundant -mtriple option.
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Sam McCall authored
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