- Dec 31, 2019
-
-
Shengchen Kan authored
1. make function Is16BitMemOperand static 2. Use Doxygen features in comment 3. Rename functions to make them start with a lower case letter
-
Johannes Doerfert authored
If we have `int foo(int a) { return a; }` and we run with --function-signature enabled, we want a single variable declaration for `a` which is reused later. Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D69722 -
Johannes Doerfert authored
Attribute annotations on calls, e.g., #0, are not useful on their own. This patch adds a flag to update_test_checks.py to scrub them. Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D68851
-
Johannes Doerfert authored
Since the information is known we can simply use it at the call site. This is especially useful for callbacks but also helps regular calls. The test changes are mechanical.
-
Johannes Doerfert authored
This is the second step after D67871 to make use of abstract call sites. In this patch the argument we associate with a abstract call site argument can be the one in the callback callee instead of the one in the callback broker. Caveat: We cannot allow no-alias arguments for problematic callbacks: As described in [1], adding no-alias (or restrict) to arguments could break synchronization as the synchronization effect, e.g., a barrier, does not "alias" with the pointer anymore. This disables no-alias annotation for potentially problematic arguments until we implement the fix described in [1]. Reviewed By: uenoku Differential Revision: https://reviews.llvm.org/D68008 [1] Compiler Optimizations for OpenMP, J. Doerfert and H. Finkel, International Workshop on OpenMP 2018, http://compilers.cs.uni-saarland.de/people/doerfert/par_opt18.pdf
-
Johannes Doerfert authored
Especially for callbacks, annotating the call site arguments is important. Doing so exposed a too strong dependence of AAMemoryBehavior on AANoCapture since we handle the case of potentially captured pointers explicitly. The changes to the tests are all mechanical.
-
Shengchen Kan authored
-
David Blaikie authored
Seeing some curious CFI failures internally - which makes little sense to me, as I don't think anyone is using this flag (even us, internally)... so sounds like a bug in my code somewhere (possibly a latent one that propagating this flag exposed, not sure). Reverting while I investigate. This reverts commit c51b45e3.
-
Shengchen Kan authored
1. Remove function is64BitMode() and use STI.hasFeature(X86::Mode16Bit) directly 2. Use Doxygen features in comment 3. Rename functions to make them start with a lower case letter 4. Format the code with clang-format
-
River Riddle authored
Summary: A new class is added, IRMultiObjectWithUseList, that allows for representing an IR use list that holds multiple sub values(used in this case for OpResults). This class provides all of the same functionality as the base IRObjectWithUseList, but for specific sub-values. This saves a word per operation result and is a necessary step in optimizing the layout of operation results. For now the use list is placed on the operation itself, so zero-result operations grow by a word. When the work for optimizing layout is finished, this can be moved back to being a trailing object based on memory/runtime benchmarking. Reviewed By: jpienaar Differential Revision: https://reviews.llvm.org/D71955
-
Craig Topper authored
[TargetLowering][AMDGPU] Make scalarizeVectorLoad return a pair of SDValues instead of creating a MERGE_VALUES node. NFCI This allows us to clean up some places that were peeking through the MERGE_VALUES node after the call. By returning the SDValues directly, we can clean that up. Unfortunately, there are several call sites in AMDGPU that wanted the MERGE_VALUES and now need to create their own.
-
Craig Topper authored
I think this was copied from scalarizeVectorLoad where that is what happens.
-
jasonliu authored
Address David's post review comment in https://reviews.llvm.org/D71667. Add comments to clarify what we are testing in that file.
-
Craig Topper authored
-
Craig Topper authored
This replaces the fsub -0.0 idiom with an fneg instruction. We didn't see to have a test that showed the current codegen. Just some tests for constant folding and a test that was only checking the declare lines for libcalls. The latter just checked that we did not have a declare for @conj when using __builtin_conj. Differential Revision: https://reviews.llvm.org/D72012
-
Craig Topper authored
We have an fneg instruction now and should use it instead of the fsub -0.0 idiom. Looks like we had no test that showed that we handled the negation cases here so I've added new tests. Differential Revision: https://reviews.llvm.org/D72010
-
Eric Astor authored
-
Johannes Doerfert authored
The new check line is compatible with the clang code generation check line as it allows a 64 and 32 bit value. I hope this makes the llvm-clang-win-x-armv7l buildbot happy.
-
Jon Chesterfield authored
-
Jinsong Ji authored
Summary: Embedded PowerPC are still actively supported, especially SPE... So update some important references here: * adding EREF * adding SPE/VLE ref Delete deprecated ones into "Other documents..". Reviewers: #powerpc, jhibbits, hfinkel Reviewed By: #powerpc, jhibbits Subscribers: wuzish, merge_guards_bot, nemanjai, shchenz, steven.zhang, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72008
-
Johannes Doerfert authored
This allows to use the OpenMPIRBuilder for parallel regions. Code was extracted from D61953 and adapted to work with the new version (D70109). All but one feature should be supported. An update of this patch will provide test coverage and privatization other than shared. Reviewed By: fghanim Differential Revision: https://reviews.llvm.org/D70290
-
Johannes Doerfert authored
An `omp cancel parallel` needs to be emitted by the OpenMPIRBuilder if the `parallel` was emitted by the OpenMPIRBuilder. This patch makes this possible. The cancel logic is shared with the cancel barriers. Testing is done via unit tests and the clang cancel_codegen.cpp file once D70290 lands. Reviewed By: JonChesterfield Differential Revision: https://reviews.llvm.org/D71948
-
Eric Astor authored
Summary: Amend MS offset operator implementation, to more closely fit with its MS counterpart: 1. InlineAsm: evaluate non-local source entities to their (address) location 2. Provide a mean with which one may acquire the address of an assembly label via MS syntax, rather than yielding a memory reference (i.e. "offset asm_label" and "$asm_label" should be synonymous 3. address PR32530 Based on http://llvm.org/D37461 Fix broken test where the break appears unrelated. - Set up appropriate memory-input rewrites for variable references. - Intel-dialect assembly printing now correctly handles addresses by adding "offset". - Pass offsets as immediate operands (using "r" constraint for offsets of locals). Reviewed By: rnk Differential Revision: https://reviews.llvm.org/D71436 -
Matt Arsenault authored
-
Matt Arsenault authored
This assumed a single pattern if there was a predicate. Relax this a bit, and allow multiple patterns as long as they have the same class. This was only broken for the DAG path. GlobalISel seems to have handled this correctly already.
-
Craig Topper authored
If only the sign bit is demanded, and the LHS is all zeroes, then we can bypass the PCMPGT.
-
Bryan Chan authored
Parsing `ls -l` output to obtain the size of a file is unreliable; the exact output format is not specified, and some user or group names may contain multiple words, causing `cut -f5 -d' '` to extract an incorrect value. `wc -c`, on the other hand, is portable, and there are precendents of its use in test cases.
-
Matt Arsenault authored
-
Fangrui Song authored
D56351 (included in LLVM 8.0.0) introduced "frame-pointer". All tests which use "no-frame-pointer-elim" or "no-frame-pointer-elim-non-leaf" have been migrated to use "frame-pointer". Implement UpgradeFramePointerAttributes to upgrade the two obsoleted function attributes for bitcode. Their semantics are ignored. Differential Revision: https://reviews.llvm.org/D71863
-
Sanjay Patel authored
-
Petar Avramovic authored
G_BITREVERSE is generated from llvm.bitreverse.<type> intrinsics, clang genrates these intrinsics from __builtin_bitreverse32 and __builtin_bitreverse64. Add lower and narrowscalar for G_BITREVERSE. Lower G_BITREVERSE on MIPS32. Recommit notes: Introduce temporary variables in order to make sure instructions get inserted into MachineFunction in same order regardless of compiler used to build llvm. Differential Revision: https://reviews.llvm.org/D71363
-
Matt Arsenault authored
-
Sanjay Patel authored
This is another optimization suggested in PR44153: https://bugs.llvm.org/show_bug.cgi?id=44153
-
- Dec 30, 2019
-
-
Diogo Sampaio authored
Summary: Add missing part of patch D71361. Now that the stack-frame can be operated using a addw/subw instruction, they should appear in the unwinding list. Reviewers: dmgreen, efriedma Reviewed By: dmgreen Subscribers: kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D72000
-
Matt Arsenault authored
-
Matt Arsenault authored
-
Matt Arsenault authored
The path already used for f16/f32 works a lot better when v_trunc_f64 is available.
-
Matt Arsenault authored
-
Matt Arsenault authored
Sometimes the result bank of the phi is already assigned to something, and should not be ignored. This is in preparation for additional boolean phi handling changes. Also refine the logic to fix some cases that were incorrectly deciding to use SGPRs.
-
Nemanja Ivanovic authored
VSX provides a full complement of rounding instructions yet we somehow ended up with some of them legal and others not. This just legalizes all of the FP rounding nodes and the FP -> int rounding nodes with unsafe math. Differential revision: https://reviews.llvm.org/D69949
-