1. Apr 15, 2019
    • Amara Emerson's avatar
      [GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constants only. · 946b1246
      Amara Emerson authored
      Other opcodes shouldn't be CSE'd until we can be sure debug info quality won't
      be degraded.
      
      This change also improves the IRTranslator so that in most places, but not all,
      it creates constants using the MIRBuilder directly instead of first creating a
      new destination vreg and then creating a constant. By doing this, the
      buildConstant() method can just return the vreg of an existing G_CONSTANT
      instead of having to create a COPY from it.
      
      I measured a 0.2% improvement in compile time and a 0.9% improvement in code
      size at -O0 ARM64.
      
      Compile time:
      Program                                        base   cse    diff
      test-suite...ark/tramp3d-v4/tramp3d-v4.test     9.04   9.12  0.8%
      test-suite...Mark/mafft/pairlocalalign.test     2.68   2.66 -0.7%
      test-suite...-typeset/consumer-typeset.test     5.53   5.51 -0.4%
      test-suite :: CTMark/lencod/lencod.test         5.30   5.28 -0.3%
      test-suite :: CTMark/Bullet/bullet.test        25.82  25.76 -0.2%
      test-suite...:: CTMark/ClamAV/clamscan.test     6.92   6.90 -0.2%
      test-suite...TMark/7zip/7zip-benchmark.test    34.24  34.17 -0.2%
      test-suite :: CTMark/SPASS/SPASS.test           6.25   6.24 -0.1%
      test-suite...:: CTMark/sqlite3/sqlite3.test     1.66   1.66 -0.1%
      test-suite :: CTMark/kimwitu++/kc.test         13.61  13.60 -0.0%
      Geomean difference                                          -0.2%
      
      Code size:
      Program                                        base     cse      diff
      test-suite...-typeset/consumer-typeset.test    1315632  1266480 -3.7%
      test-suite...:: CTMark/ClamAV/clamscan.test    1313892  1297508 -1.2%
      test-suite :: CTMark/lencod/lencod.test        1439504  1423112 -1.1%
      test-suite...TMark/7zip/7zip-benchmark.test    2936980  2904172 -1.1%
      test-suite :: CTMark/Bullet/bullet.test        3478276  3445460 -0.9%
      test-suite...ark/tramp3d-v4/tramp3d-v4.test    8082868  8033492 -0.6%
      test-suite :: CTMark/kimwitu++/kc.test         3870380  3853972 -0.4%
      test-suite :: CTMark/SPASS/SPASS.test          1434904  1434896 -0.0%
      test-suite...Mark/mafft/pairlocalalign.test    764528   764528   0.0%
      test-suite...:: CTMark/sqlite3/sqlite3.test    782092   782092   0.0%
      Geomean difference                                              -0.9%
      
      Differential Revision: https://reviews.llvm.org/D60580
      
      llvm-svn: 358369
      946b1246
    • Amara Emerson's avatar
      [GlobalISel] Introduce a CSEConfigBase class to allow targets to define their own CSE configs. · d189680b
      Amara Emerson authored
      Because CodeGen can't depend on GlobalISel, we need a way to encapsulate the CSE
      configs that can be passed between TargetPassConfig and the targets' custom
      pass configs. This CSEConfigBase allows targets to create custom CSE configs
      which is then used by the GISel passes for the CSEMIRBuilder.
      
      This support will be used in a follow up commit to allow constant-only CSE for
      -O0 compiles in D60580.
      
      llvm-svn: 358368
      d189680b
    • Nico Weber's avatar
    • Nico Weber's avatar
      gn build: Merge r358297 · 274f305a
      Nico Weber authored
      llvm-svn: 358366
      274f305a
    • Nico Weber's avatar
      gn build: Merge r358243 · 6de31be6
      Nico Weber authored
      llvm-svn: 358365
      6de31be6
    • Nico Weber's avatar
      gn build: Merge r358272 · ce1452ad
      Nico Weber authored
      llvm-svn: 358364
      ce1452ad
    • Nico Weber's avatar
      llvm-undname: Fix another crash-on-invalid found by oss-fuzz · 63fe2593
      Nico Weber authored
      llvm-svn: 358363
      63fe2593
    • Craig Topper's avatar
      [X86] Redefine KUNPCK instructions to take a narrower source register class... · 5b92eb00
      Craig Topper authored
      [X86] Redefine KUNPCK instructions to take a narrower source register class than destination register class. Remove copies from the isel output pattern.
      
      There's no reason for the inputs to be the destination register class. This just
      forces an unnecessary copy in the output patterns.
      
      llvm-svn: 358362
      5b92eb00
    • Craig Topper's avatar
      [X86] Put the locked mi8 instrutions above the locked mi/mi32 so they will be prefered. · 96950f1f
      Craig Topper authored
      We want 64mi8 to be prefered over 64mi32. The order for 16mi/32mi doesn't
      really matter.
      
      llvm-svn: 358361
      96950f1f
    • Craig Topper's avatar
      [X86] Change IMUL with immediate instruction order to ri8 instructions come... · 72b976e5
      Craig Topper authored
      [X86] Change IMUL with immediate instruction order to ri8 instructions come before ri/ri32 instructions.
      
      This will ensure IMUL64ri8 is tried before IMUL64ri32. For IMUL32 and IMUL16 the
      order doesn't really matter because only the ri8 versions use a predicate. That
      automatically gives them priority.
      
      llvm-svn: 358360
      72b976e5
    • Craig Topper's avatar
      [X86] Move VPTESTM matching from the isel table to custom code in X86ISelDAGToDAG. · 3c579764
      Craig Topper authored
      We had many tablegen patterns for these instructions. And due to the
      commutability of the patterns, tablegen expands them to even more patterns. All
      together VPTESTMD patterns accounted for more the 50K of the 610K isel table.
      This had gotten bad when we stopped canonicalizing AND to vXi64. This required
      a pattern for every combination of bitcast input type.
      
      This change moves the matching to custom code where it is easier to look through
      the bitcasts without being concerned with the specific types.
      
      The test changes are because we are now stricter with one use checks as its
      required to make load folding legal. We now require the AND and any BITCAST to
      only have a single use. This prevents forming VPTESTM and a VPAND with the same
      inputs.
      
      We now support broadcast loads for 128/256 patterns without VLX. We'll widen to
      512-bit like and still fold the broadcast since the amount of memory read
      doesn't change.
      
      There are a few tests that got slightly longer because are now prefering
      load + VPTESTM over XOR+VPCMPEQ for (seteq (load), allzeros). Previously we were
      able to share the XOR with multiple VPTESTM instructions.
      
      llvm-svn: 358359
      3c579764
    • Craig Topper's avatar
      [X86] Don't form masked vpcmp/vcmp/vptestm operations if the setcc node has more than one use. · b17e5ec6
      Craig Topper authored
      We're better of emitting a single compare + kand rather than a compare for the
      other use and a masked compare.
      
      I'm looking into using custom instruction selection for VPTESTM to reduce the
      ridiculous number of permutations of patterns in the isel table. Putting a one
      use check on all masked compare folding makes load fold matching in the custom
      code easier.
      
      llvm-svn: 358358
      b17e5ec6
  2. Apr 14, 2019
  3. Apr 13, 2019