1. Aug 09, 2019
  2. Aug 08, 2019
    • Simon Pilgrim's avatar
      [X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask · 67c246bb
      Simon Pilgrim authored
      If we don't demand all elements, then attempt to combine to a simpler shuffle.
      
      At the moment we can only do this if Depth == 0 as combineX86ShufflesRecursively uses Depth to track whether the shuffle has really changed or not - we'll need to change this before we can properly start merging combineX86ShufflesRecursively into SimplifyDemandedVectorElts. 
      
      The insertps-combine.ll regression is because XFormVExtractWithShuffleIntoLoad can't see through shuffles of different widths - this will be fixed in a follow-up commit.
      
      llvm-svn: 368307
      67c246bb
    • David Tenty's avatar
      Enable assembly output of local commons for AIX · 8558aac8
      David Tenty authored
      Summary:
      This patch enable assembly output of local commons for AIX using .lcomm
      directives. Adds a EmitXCOFFLocalCommonSymbol to MCStreamer so we can emit the
      AIX version of .lcomm assembly directives which include a csect name. Handle the
      case of BSS locals in PPCAIXAsmPrinter by using EmitXCOFFLocalCommonSymbol. Adds
      a test for generating .lcomm on AIX Targets.
      
      Reviewers: cebowleratibm, hubert.reinterpretcast, Xiangling_L, jasonliu, sfertile
      
      Reviewed By: sfertile
      
      Subscribers: wuzish, nemanjai, hiraditya, kbarton, MaskRay, jsji, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D64825
      
      llvm-svn: 368306
      8558aac8
    • David Green's avatar
      [ARM] Add support for MVE pre and post inc loads and stores · 27ca82f3
      David Green authored
      This adds pre- and post- increment and decrements for MVE loads and stores. It
      uses the builtin pre and post load/store detection, unlike Neon. Loads are
      selected with the code in tryT2IndexedLoad, stores are selected with tablegen
      patterns. The immediates have a +/-7bit range, multiplied by the size of the
      element.
      
      Differential Revision: https://reviews.llvm.org/D63840
      
      llvm-svn: 368305
      27ca82f3
    • David Green's avatar
      [ARM] MVE big endian loads/stores · 824ffd8b
      David Green authored
      This adds some missing patterns for big endian loads/stores, allowing unaligned
      loads/stores to also be selected with an extra VREV, which produces better code
      than aligning through a stack. Also moves VLDR_P0 to not be LE only, and
      adjusts some of the tests to show all that working.
      
      Differential Revision: https://reviews.llvm.org/D65583
      
      llvm-svn: 368304
      824ffd8b
    • Sam Elliott's avatar
      [RISCV] Allow ABI Names in Inline Assembly Constraints · 856d5c58
      Sam Elliott authored
      Summary:
      Clang will replace references to registers using ABI names in inline
      assembly constraints with references to architecture names, but other
      frontends do not. LLVM uses the regular assembly parser to parse inline asm,
      so inline assembly strings can contain references to registers using their
      ABI names.
      
      This patch adds support for parsing constraints using either the ABI name or
      the architectural register name. This means we do not need to implement the
      ABI name replacement code in every single frontend, especially those like
      Rust which are a very thin shim on top of LLVM IR's inline asm, and that
      constraints can more closely match the assembly strings they refer to.
      
      Reviewers: asb, simoncook
      
      Reviewed By: simoncook
      
      Subscribers: hiraditya, rbar, johnrusso, JDevlieghere, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D65947
      
      llvm-svn: 368303
      856d5c58
    • Louis Dionne's avatar
      [pstl] Remove stray semicolon · 21536073
      Louis Dionne authored
      llvm-svn: 368302
      21536073
    • Diogo N. Sampaio's avatar
      [FIX][NFC] Update clang sema test · dd591977
      Diogo N. Sampaio authored
      Try to fix Sema test for default alignment for when
      compiling to ARM, but not to android, due
      r9427aa2d
      
      llvm-svn: 368301
      dd591977
    • Sam Elliott's avatar
      [RISCV] Minimal stack realignment support · cd44aee3
      Sam Elliott authored
      Summary:
      Currently the RISC-V backend does not realign the stack. This can be an issue even for the RV32I/RV64I ABIs (where the stack is 16-byte aligned), though is rare. It will be much more comment with RV32E (though the alignment requirements for common data types remain under-documented...).
      
      This patch adds minimal support for stack realignment. It should cope with large realignments. It will error out if the stack needs realignment and variable sized objects are present.
      
      It feels like a lot of the code like getFrameIndexReference and determineFrameLayout could be refactored somehow, as right now it feels fiddly and brittle. We also seem to allocate a lot more memory than GCC does for equivalent C code.
      
      Reviewers: asb
      
      Reviewed By: asb
      
      Subscribers: wwei, jrtc27, s.egerton, MaskRay, Jim, lenary, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D62007
      
      llvm-svn: 368300
      cd44aee3
    • Marshall Clow's avatar
      fde236b1
    • Fangrui Song's avatar
      ba4bda65
    • Thomas Preud'homme's avatar
      [FileCheck] Add missing includes in header · b1add2b7
      Thomas Preud'homme authored
      Reviewers: jhenderson, chandlerc, jdenny, probinson, grimar, arichardson, rnk
      
      Subscribers: hiraditya, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D65778
      
      llvm-svn: 368297
      b1add2b7
    • Tim Corringham's avatar
      Add llvm.licm.disable metadata · 4f64f1ba
      Tim Corringham authored
      For some targets the LICM pass can result in sub-optimal code in some
      cases where it would be better not to run the pass, but it isn't
      always possible to suppress the transformations heuristically.
      
      Where the front-end has insight into such cases it is beneficial
      to attach loop metadata to disable the pass - this change adds the
      llvm.licm.disable metadata to enable that.
      
      Differential Revision: https://reviews.llvm.org/D64557
      
      llvm-svn: 368296
      4f64f1ba