- Feb 13, 2024
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Mehdi Amini authored
Apply clang-tidy fixes for performance-unnecessary-value-param in BufferizableOpInterfaceImpl.cpp (NFC)
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Mehdi Amini authored
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Artem Belevich authored
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Rishi Surendran authored
Add support for attribute nvvm.grid_constant on LLVM function arguments. The attribute can be attached only to arguments of type llvm.ptr that have llvm.byval attribute. Generate LLVM metadata for functions with nvvm.grid_constant arguments. The metadata node is a list of integers, where each integer n denotes that the nth parameter has the grid_constant annotation (numbering from 1). The generated metadata node will be handled by NVVM compiler. See https://docs.nvidia.com/cuda/nvvm-ir-spec/index.html#supported-properties for documentation on grid_constant property. This patch also adds convertParameterAttr to LLVMTranslationDialectInterface for supporting the translation of derived dialect attributes on function parameters
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Artem Belevich authored
The replacement should've had BFE() as the arguments for the comparison, not the source register. While at that, tighten the patterns a bit, and expand them to cover variants with immediate arguments. Also change the default lowering of bfe() to use unsigned variant, so the value of the upper bits is predictable.
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Andy Kaylor authored
This refactors the fast-math handling in the clang driver, moving the settings into a lambda that is shared by the -ffp-model=fast and -ffast-math code. Previously the -ffp-model=fast handler changed the local option variable and fell through to the -ffast-math handler. This refactoring is intended to prepare the way for decoupling the -ffp-model=fast settings from the -ffast-math settings and possibly introduce a less aggressive fp-model.
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Jordan Rupprecht authored
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Ben Langmuir authored
Switch the primary implementation of EPC lookupSymbols to be async, keeping a synchronous wrapper for compatibility. Use the new async implementation inside EPCDynamicLibrarySearchGenerator to work working towards a fully async search generator. Provide an asynchronous lookup API for EPCGenericDylibManager and adopt that from the SimpleRemoteEPC. This enables an end-to-end async EPCDynamicLibrarySearchGenerator. Note: currently we keep the current per-dlhandle lookup model, but a future improvement could do a single async call for a given lookup operation.
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srcarroll authored
This refactored pattern rewrite is intended to be reused by any `LinalgOp`'s canonicalization pattern for removing identity ops. Additionally, this canonicalization has been applied to `BroadCastOp`.
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Mariusz Borsa authored
Turns out this arch is needed by the ABI impls rdar://121963634 Co-authored-by:
Mariusz Borsa <m_borsa@apple.com>
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Jonas Hahnfeld authored
As noted in issues #68594 and #73935, `JITLink/RISCV/ELF_ehframe.s` fails with libstdc++'s expensive checks because `getRISCVPCRelHi20` calls `std::equal_range` on the edges which may not be ordered by their offset. Instead let `ELFJITLinker_riscv` build a hashmap of all edges with type `R_RISCV_PCREL_HI20` that can be looked up in constant time. Closes #73935
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Florian Hahn authored
Row and column arguments for matrix_transpose indicate the shape of the operand. When hoisting the transpose to the result of the add, the add operates on the original operand's shape, and so does the hoisted transpose. This patch also adds an assert that the shape for the original add and the transpose match, as well as the shape of the new add matches the cached shape for it. The assert could potentially be moved to updateShapeAndReplaceAllUsesWith.
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Konstantin Zhuravlyov authored
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Vlad Serebrennikov authored
Covers CWG issues [124](https://cplusplus.github.io/CWG/issues/124.html) [185](https://cplusplus.github.io/CWG/issues/185.html), [193](https://cplusplus.github.io/CWG/issues/193.html), [199](https://cplusplus.github.io/CWG/issues/199.html). I also looked at [190](https://cplusplus.github.io/CWG/issues/190.html), but concluded that we should try to test it via C++20 `std::is_layout_compatible` first. I tried to group tests under `dr1xx-codegen.cpp`, but found out that CodeGen can arbitrarily reorder function definitions in LLVM module. In particular, interleaving between regular function definitions and destructor definitions present in the source might not be preserved, which messes up FileCheck directives. `CHECK-DAG` can help with that, but its interaction with `CHECK-LABEL` (lack of thereof) would require me to relax tests too much.
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Alexey Bataev authored
The mask for the reshuffling/resizing might be calculated incorrectly, fixed.
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Fangrui Song authored
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Mirko Brkušanin authored
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J. Ryan Stinnett authored
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Haojian Wu authored
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Alexey Bataev authored
Added basic support for strided loads support in SLP vectorizer. Supports constant strides only. If the strided load must be reversed, applies -stride to avoid extra reverse shuffle. Reviewers: preames, lukel97 Reviewed By: preames Pull Request: https://github.com/llvm/llvm-project/pull/80310
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Rolf Morel authored
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Logikable authored
In the beginning, Clang only emitted atomic IR for operations it knew the underlying microarch had instructions for, meaning it required significant knowledge of the target. Later, the backend acquired the ability to lower IR to libcalls. To avoid duplicating logic and improve logic locality, we'd like to move as much as possible to the backend. There are many ways to describe this change. For example, this change reduces the variables Clang uses to decide whether to emit libcalls or IR, down to only the atomic's size.
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Felipe de Azevedo Piovezan authored
The DWARF 5 debug_str_offsets section starts with a header, which must be skipped in order to access the underlying `strp`s. However, the verifier supports some pre-standardization version of this section (with the same section name), which does not have a header. In this case, the offsets start on the first byte of the section. More in [1] and [2] about this legacy section. How does The DWARF verifier figure out which version to use? It manually reads the **first** header in debug_info and uses that. This is wrong when multiple debug_str_offset sections have been linked together, in particular it is wrong in the following two cases: 1. A standard DWARF 4 object file (i.e. no debug_str_offsets) linked with a standard DWARF 5 object file. 2. A non-standard DWARF 4 object file (i.e. containing the header-less debug_str_offsets section) linked with a standard DWARF 5 object file. Based on discussions in https://github.com/llvm/llvm-project/pull/81210, the legacy version is only possible with dwo files, and dwo files cannot mix the legacy version with the dwarf 5 version. As such, we change the verifier to only check the debug_info header in the case of dwo files. If it sees a dwarf 4 version, it handles it the legacy way. Note: the modified test was technically testing an unsupported combination of dwarf version + non-dwo sections. To see why, simply note that the test contained no `debug_info.dwo` sections, so the call to DWARFObject::forEachInfoDWOSections was doing nothing. We were finding the error through the "standard version", which shouldn't happen. [1]: https://gcc.gnu.org/wiki/DebugFission [2]: https://gcc.gnu.org/wiki/DebugFissionDWP
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Vlad Serebrennikov authored
This patch converts `Sema::TemplateDeductionResult` into a scoped enum in namespace scope, making it eligible for forward declaring. This is useful in certain contexts, such as `preferred_type` annotations on bit-fields.
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Felipe de Azevedo Piovezan authored
This commit brings support for debug_names in DWARFYAML. It parses YAML and generates emits a DWARF5 Accelerator table with the following limitations: 1. All forms must have a fixed length (zero length is also ok). 2. Hard-coded support for DWARF 5 and DWARF32. 3. The generated table does not contain a hash index All of these limitations can be lifted in the future, but for now this is good enough to enable testing.
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David Truby authored
This patch reworks the way that parallel reduction operations function to better match the expected semantics from the OpenMP specification. Previously specific omp.reduction operations were used inside the region, meaning that the reduction only applied when the correct operation was used, whereas the specification states that any change to the variable inside the region should be taken into account for the reduction. The new semantics create a private reduction variable as a block argument which should be used normally for all operations on that variable in the region; this private variable is then combined with the others into the shared variable. This way no special omp.reduction operations are needed inside the region. This patch only makes the change for the `parallel` operation, the change for the `wsloop` operation will be in a separate patch. --------- Co-authored-by:Kiran Chandramohan <kiran.chandramohan@arm.com>
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Craig Topper authored
The bug mentioned in the comment has been committed and did change the cfi_offset.
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Craig Topper authored
When a branch target is too far away we need to emit an indirect branch. We scavenge a register for this since we don't know we need this until after register allocation. Jumps using X1 and X5 as the source are hints to the hardware to pop the return-address stack. We should avoiding using them for jumps that aren't a return or tail call.
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Usman Nadeem authored
Follow-up for #78374
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Timm Bäder authored
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Valentin Clement (バレンタイン クレメン) authored
These hardcoded attribute name are a leftover from the upstreaming period when there was no way to get the attribute name without an instance of the operation. It is since possible to do without them and they should be removed to avoid duplication. This PR cleanup the fir.dt_entry and fir.dispatch ops of these hardcoded attribute name and use their generated getters. Some other PRs will follow to cleanup other operations.
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Valentin Clement (バレンタイン クレメン) authored
These hardcoded attribute name are a leftover from the upstreaming period when there was no way to get the attribute name without an instance of the operation. It is since possible to do without them and they should be removed to avoid duplication. This PR cleanup the fir.global op of these hardcoded attribute name and use their generated getters. Some other PRs will follow to cleanup other operations.
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Alexey Bataev authored
This reverts commit 0940f908 to fix issues reported in https://github.com/llvm/llvm-project/pull/80310.
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Jay Foad authored
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Andrei Safronov authored
This PR provides implementation of the basic codegen infra such as TargetFrameLowering, MCInstLower, AsmPrinter, RegisterInfo, InstructionInfo, TargetLowering, SelectionDAGISel. Migrated from https://reviews.llvm.org/D145658
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Vlad Serebrennikov authored
This patch refactors how values are stored inside `IdentifierInfo::ObjcOrBuiltinID` bit-field, and annotates it with `preferred_type`. In order to make the value easier to interpret by debuggers, a new `ObjCKeywordOrInterestingOrBuiltin` enum is added. Previous "layout" of this fields couldn't be represented with this new enum, because it skipped over some arbitrary enumerators, so a new "layout" was invented, which is reflected in `ObjCKeywordOrInterestingOrBuiltin` enum. I believe the new layout is simpler than the new one.
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Konstantin Zhuravlyov authored
- s_barrier is not present on gfx12
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Nick Desaulniers authored
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Benjamin Maxwell authored
The interleave operation constructs a new vector by interleaving the elements from the trailing (or final) dimension of two input vectors, returning a new vector where the trailing dimension is twice the size. Note that for the n-D case this differs from the interleaving possible with `vector.shuffle`, which would only operate on the leading dimension. Another key difference is this operation supports scalable vectors, though currently a general LLVM lowering is limited to the case where only the trailing dimension is scalable. Example: ```mlir %0 = vector.interleave %a, %b : vector<[4]xi32> ; yields vector<[8]xi32> %1 = vector.interleave %c, %d : vector<8xi8> ; yields vector<16xi8> %2 = vector.interleave %e, %f : vector<f16> ; yields vector<2xf16> %3 = vector.interleave %g, %h : vector<2x4x[2]xf64> ; yields vector<2x4x[4]xf64> %4 = vector.interleave %i, %j : vector<6x3xf32> ; yields vector<6x6xf32> ``` Note: This change alone does not add any lowerings. -
Florian Hahn authored
Add extra test coverage for transpose lifting using -matrix-print-after-transpose-opt. The added tests show a mis-compile.
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