- Sep 17, 2020
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Max Kazantsev authored
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Valentin Clement authored
Lower OpenACCLoopConstruct and most of the clauses to the OpenACC acc.loop operation in MLIR. This patch refelcts what can be upstream from PR flang-compiler/f18-llvm-project#419 Reviewed By: SouraVX Differential Revision: https://reviews.llvm.org/D87389
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Valentin Clement authored
This patch change the type of operands async, wait, numGangs, numWorkers and vectorLength from index to AnyInteger to fit with acc.loop and the OpenACC specification. Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D87712
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David Green authored
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Yaxun (Sam) Liu authored
In CUDA/HIP a function may become implicit host device function by pragma or constexpr. A host device function is checked in both host and device compilation. However it may be emitted only on host or device side, therefore the diagnostics should be deferred until it is known to be emitted. Currently clang is only able to defer certain diagnostics. This causes false alarms and limits the usefulness of host device functions. This patch lets clang defer all overloading resolution diagnostics for host device functions. An option -fgpu-defer-diag is added to control this behavior. By default it is off. It is NFC for other languages. Differential Revision: https://reviews.llvm.org/D84364
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Sanne Wouda authored
D75689 turns the faddp pattern into a shuffle with vector add. Match this new pattern in target-specific DAG combine, rather than ISel, because legalization (for v2f32) turns it into a bit of a mess. - extended to cover f16, f32, f64 and i64
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Sanne Wouda authored
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Matt Morehouse authored
Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D87801
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Alexey Bataev authored
This patch fixes the problem that user-defined mapper array is not correctly privatized inside a task. This problem causes openmp/libomptarget/test/offloading/target_depend_nowait.cpp fails. Differential Revision: https://reviews.llvm.org/D84470
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Xun Li authored
When a spill definition is before CoroBegin, we cannot spill it to the frame immediately after the definition. We have to spill it after the frame is ready. The current implementation handles it properly for any other kinds of instructions except for PhINode and InvokeInst, which could also be defined before CoroBegin. This patch fixes it by moving the CoroBegin dominance check earlier, so that it covers all cases. Added a test. Differential Revision: https://reviews.llvm.org/D87810
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Louis Dionne authored
We don't support GCC in C++03 mode, and Clang provides variadic templates even in C++03 mode. So there's effectively no supported compiler that doesn't support variadic templates. This effectively gets rid of all uses of _LIBCPP_HAS_NO_VARIADICS, but some workarounds for the lack of variadics remain.
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Michael Liao authored
- Need to lower COPY from SGPR to VGPR to a real instruction as the standard COPY is used where the source and destination are from the same register bank so that we potentially coalesc them together and save one COPY. Considering that, backend optimizations, such as CSE, won't handle them. However, the copy from SGPR to VGPR always needs materializing to a native instruction, it should be lowered into a real one before other backend optimizations. Differential Revision: https://reviews.llvm.org/D87556
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David Green authored
The predicated MVE intrinsics are generated as, for example, llvm.arm.mve.add.predicated(x, splat(y). p). We need to sink the splat value back into the loop, like we do for other instructions, so we can re-select qr variants. Differential Revision: https://reviews.llvm.org/D87693
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Kamil Rytarowski authored
Fixes the build after landing https://reviews.llvm.org/D87562
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Stephan Herhut authored
Adds a pattern that replaces a chain of two tensor_cast operations by a single tensor_cast operation if doing so will not remove constraints on the shapes.
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Kamil Rytarowski authored
Fixes the build after landing D87562.
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Kamil Rytarowski authored
Fixes build on NetBSD/sparc64.
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alex-t authored
Instruction combining pass turns library rotl implementation to llvm.fshl.i16. In the selection dag the intrinsic is turned to ISD::ROTL node that cannot be selected. Need to expand it to shifts again. Reviewed By: rampitec, arsenm Differential Revision: https://reviews.llvm.org/D87618
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Kamil Rytarowski authored
Error out during build for unsupported CPU. Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D87602
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Kamil Rytarowski authored
This fixes the clash with BSD headers. Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D87562
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Simon Pilgrim authored
Already included in LiveDebugVariables.h
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Simon Pilgrim authored
Already included in DwarfExpression.h
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Simon Pilgrim authored
Already included in ValueList.h
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Kamil Rytarowski authored
Avoid fallbacking to software emulated compiler atomics, that are usually provided by libatomic, which is not always present. This fixes the test on NetBSD, which does not provide libatomic in base. Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D87568
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Simon Pilgrim authored
Already included in SafeStackLayout.h
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jerryyin authored
Differential Revision: https://reviews.llvm.org/D87773
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Simon Pilgrim authored
Move the include down to cpp files with an implicit dependency.
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Yvan Roux authored
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Florian Hahn authored
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Kerry McLaughlin authored
This patch adds new ISD nodes, FCVTZS_MERGE_PASSTHRU & FCVTZU_MERGE_PASSTHRU, which are used to lower scalable vector FP_TO_SINT/FP_TO_UINT operations and the following intrinsics: - llvm.aarch64.sve.fcvtzu - llvm.aarch64.sve.fcvtzs Reviewed By: efriedma, paulwalker-arm Differential Revision: https://reviews.llvm.org/D87232
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Georgii Rymar authored
When ELF header's `e_machine == 0`, we emit: ``` Machine: EM_NONE ``` We can avoid doing this, because yaml2obj sets the `e_machine` field to `EM_NONE` by default. Differential revision: https://reviews.llvm.org/D87829
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Georgii Rymar authored
We have an issue with `ELFDumper<ELFT>::getSymbolSectionName`: 1) It is used deeply for both LLVM/GNU styles and might return LLVM-style only values to describe symbols: "Undefined", "Processor Specific", "Absolute", etc. 2) `getSymbolSectionName` is used by `getFullSymbolName` and these special values might appear in instead of symbol names in many places. This occurs for unnamed section symbols. It was not noticed because for most cases I've found it is unexpected to have an unnamed section symbol. This patch documents the existent behavior, adds tests and FIXMEs. Differential revision: https://reviews.llvm.org/D87763
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Sanjay Patel authored
This is one (small) part of improving PR41312: https://llvm.org/PR41312 As shown there and in the smaller tests here, if we have some member of the reduction values that does not match the others, we want to push it to the end (bring the matching members forward and together). In the regression tests, we have 5 candidates for the 4 slots of the reduction. If the one "wrong" compare is grouped with the others, it prevents forming the ideal v4i1 compare reduction. Differential Revision: https://reviews.llvm.org/D87772
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Jessica Clarke authored
D79916 changed the behaviour from -O2 to -O1 but the documentation was not updated to reflect this.
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Simon Pilgrim authored
All of these forward declarations are fully defined in headers that are directly included.
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Mikael Holmen authored
gcc 7.4 warns about it.
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mydeveloperday authored
https://bugs.llvm.org/show_bug.cgi?id=47461 The following change {D80940} caused a regression in code which ifdef's around the try and catch block cause incorrect brace placement around the catch ``` try { } catch (...) { // This is not a small function bar = 1; } } ``` The brace after the catch will be placed on a newline Reviewed By: curdeius Differential Revision: https://reviews.llvm.org/D87291
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Simon Pilgrim authored
Already included in MetadataLoader.h
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Simon Pilgrim authored
Use forward declarations where possible, move includes down to SymbolizableObjectFile.cpp and avoid duplicate includes.
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Sam Parker authored
Run update script on one test and add another.
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