- Aug 08, 2023
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Timm Bäder authored
Differential Revision: https://reviews.llvm.org/D157074
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Dmitri Gribenko authored
This target goes over the limit in some build modes.
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Jonas Devlieghere authored
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Jonas Devlieghere authored
Discourse discussion: https://discourse.llvm.org/t/rfc-update-lldb-code-ownership/72253 Differential revision: https://reviews.llvm.org/D156949
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Kazu Hirata authored
Differential Revision: https://reviews.llvm.org/D157073
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Nikita Popov authored
Failure to vectorize this led to a revert of D156532, so add a PhaseOrdering test to prevent this from happening again.
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Ritanya B Bharadwaj authored
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Alexey Bataev authored
The issue is actually related to ScatterVectorize nodes. If such node gets reordered during bottom-to-top reordering, it may have associated non-empty ReorderIndices. In this case, such nodes need to be handled the same way as regular Vectorize nodes, not NeedToGather nodes. In this case we need to reorder ReorderIndices array rather than scalars.
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Guillaume Chatelet authored
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Fabian Mora authored
**For an explanation of these patches see D154153.** Commit message: This patch adds the utility base class `ModuleToObject`. This class provides an interface for compiling module operations into binary strings, by default this class serialize modules to LLVM bitcode. Reviewed By: mehdi_amini Differential Revision: https://reviews.llvm.org/D154100
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David Green authored
This reverts commit 1f370886 as it causes a large regression in x264, and some other regressions in downstream embedded benchmarks under LTO.
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Sunil Kuravinakop authored
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Kadir Cetinkaya authored
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Kadir Cetinkaya authored
We received some user feedback around this being disruptful rather than useful in certain workflows so add an option to control the output behaviour. Differential Revision: https://reviews.llvm.org/D157390
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Joseph Huber authored
Summrary: Following D156014 we can now use aliases for NVPTX, removing this source of divergence. We require at least +ptx63 and at least sm_30 for `.alias` but this is already within what we build for with `libc` support. Reviewed By: sivachandra Differential Revision: https://reviews.llvm.org/D157323
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Yaxun (Sam) Liu authored
Currently clang does not consider host/device preference when resolving delete operator in the file scope, which causes device operator delete selected for class member initialization. Reviewed by: Artem Belevich Differential Revision: https://reviews.llvm.org/D156795
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Fabian Mora authored
This reverts commit c8e0364a.
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Fabian Mora authored
**For an explanation of these patches see D154153.** Commit message: Adds support for Target attributes in GPU modules. This change enables attaching an optional non empty array of GPU target attributes to the module. Depends on D154104 Reviewed By: mehdi_amini Differential Revision: https://reviews.llvm.org/D154113
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pvanhout authored
Otherwise device libs still has issues at O0 (in OpenCL-CTS) Depends on D156972 as well. They're unrelated fixes but both are needed to fix the issue. Fixes SWDEV-402331 Reviewed By: #amdgpu, arsenm Differential Revision: https://reviews.llvm.org/D156973
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pvanhout authored
Idx's type can be different from Ptr's, causing a "Binary operator types must match" assertion failure when emitting the MUL. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D156972
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Fabian Mora authored
**For an explanation of these patches see D154153.** Commit message: This patch adds the `GPUTargetAttrInterface` attribute interface, this interface is meant to be used as an opaque interface for serializing GPU modules into binary strings. Reviewed By: mehdi_amini, krzysz00 Differential Revision: https://reviews.llvm.org/D154104
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Fabian Mora authored
**For an explanation of these patches see D154153.** Commit message: This patch adds the utility base class `ModuleToObject`. This class provides an interface for compiling module operations into binary strings, by default this class serialize modules to LLVM bitcode. Reviewed By: mehdi_amini Differential Revision: https://reviews.llvm.org/D154100
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Alex Bradbury authored
As there is no direct bf16 libcall for these conversions, extend to f32 first. This patch includes a tiny refactoring to pull out equivalent logic in ExpandIntRes_XROUND_XRINT so it can be reused in ExpandIntRes_FP_TO_{S,U}INT. This patch also demonstrates incorrect codegen for RV32 without zfbfmin for the newly enabled tests. As it doesn't introduce that incorrect codegen (caused by the assumption that 'TypeSoftPromoteHalf' is only used for f16 types), a fix will be added in a follow-up (D157287). Differential Revision: https://reviews.llvm.org/D156990 -
Louis Dionne authored
Those are not relevant anymore since we don't have tests for private headers anymore. Differential Revision: https://reviews.llvm.org/D155880
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Louis Dionne authored
This re-introduces the workaround that had been introduced in d7ca140c and then removed in 0c0628c9, since it seems like it is needed after all. Differential Revision: https://reviews.llvm.org/D157319
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Matthias Springer authored
Support IR that is generated by the vector-to-scf lowering of N-D vector transfers with a mask. (Until now only 1-D and 2-D transfers were supported.) Only transfers that were fully unrolled are supported. Differential Revision: https://reviews.llvm.org/D157286
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Jolanta Jensen authored
This patch added checks for global entries in ReplaceWithVeclib testing using ArmPL and SLEEF vector libraries. Differential Revision: https://reviews.llvm.org/D157258
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Jie Fu authored
/data/llvm-project/mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp:969:16: error: unused variable 'inMemRefType' [-Werror,-Wunused-variable] MemRefType inMemRefType = inMemRef.getType(); ^ 1 error generated. -
Nicolas Vasilache authored
This revision adds support for direct lowering of a linalg.copy on buffers between global and shared memory to a tma async load + synchronization operations. This uses the recently introduced Hopper NVVM and NVGPU abstraction to connect things end to end. Differential Revision: https://reviews.llvm.org/D157087
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Florian Hahn authored
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Matt Devereau authored
Lower to the strided/contiguous addressing mode of ld1/ldnt1 instructions depending on register allocation. Differential Revision: https://reviews.llvm.org/D156311
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Florian Hahn authored
Independent simplification suggested in D157194.
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J. Ryan Stinnett authored
This restores the tooling library's ability to accept invocations that take a preprocessed file as the primary input. Regressed by https://reviews.llvm.org/D105695 Fixes https://github.com/llvm/llvm-project/issues/63941 Differential Revision: https://reviews.llvm.org/D157011
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Igor Kirillov authored
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yrong authored
[Clang] Fix the do while statement disappearing in AST when an error occurs in the conditional expression of the do while statement ``` constexpr int test() { do {} while (a + 1 < 10); return 0; } ``` Before: ``` `-FunctionDecl 0x56512a172650 <./recovery.cpp:1:1, line:4:1> line:1:15 constexpr test 'int ()' implicit-inline `-CompoundStmt 0x56512a172860 <col:22, line:4:1> `-ReturnStmt 0x56512a172850 <line:3:5, col:12> `-IntegerLiteral 0x56512a172830 <col:12> 'int' 0 ``` Now: ``` `-FunctionDecl 0x5642c4804650 <./recovery.cpp:1:1, line:4:1> line:1:15 constexpr test 'int ()' implicit-inline `-CompoundStmt 0x5642c48048e0 <col:22, line:4:1> |-DoStmt 0x5642c4804890 <line:2:5, col:28> | |-CompoundStmt 0x5642c4804740 <col:8, col:9> | `-BinaryOperator 0x5642c4804870 <col:18, col:26> '<dependent type>' contains-errors '<' | |-BinaryOperator 0x5642c4804850 <col:18, col:22> '<dependent type>' contains-errors '+' | | |-RecoveryExpr 0x5642c4804830 <col:18> '<dependent type>' contains-errors lvalue | | `-IntegerLiteral 0x5642c48047b0 <col:22> 'int' 1 | `-IntegerLiteral 0x5642c48047f0 <col:26> 'int' 10 `-ReturnStmt 0x5642c48048d0 <line:3:5, col:12> `-IntegerLiteral 0x5642c48048b0 <col:12> 'int' 0 ``` Reviewed By: hokein Differential Revision: https://reviews.llvm.org/D157195 -
Guray Ozen authored
When using `nvgpu.tma.async.load` Op to asynchronously load data into shared memory, it fails to account for provided offsets, potentially leading to incorrect memory access. Using offset is common practice especially with the dynamic shared memory. This work addresses the problem by ensuring proper consideration of offsets. Reviewed By: nicolasvasilache Differential Revision: https://reviews.llvm.org/D157380
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Florian Hahn authored
Model wrap flags directly using VPRecipeWithIRFlags and clean up the duplicated *NUW opcodes. D157144 will build on this and also model FMFs for VPInstruction. Reviewed By: Ayal Differential Revision: https://reviews.llvm.org/D157194
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Igor Kirillov authored
Differential Revision: https://reviews.llvm.org/D157094
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Florian Hahn authored
Use the printOperands for printing VPInstruction's operands to be more in line with other recipes and ensure consistent printing after D15719. Also removes some stray spaces in print output.
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Dmitri Gribenko authored
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