This patch add support for leak sanitizer for aarch64.  Similar to
MIPS it uses a SizeClassAllocator32 due VMA constraints (aarch64
currently supports 39 and 42-bit VMA).

llvm-svn: 249337

~CodeGenABITypes out-of-line, which should have the same effect.

Thanks to David Blaikie for pointing this out!

llvm-svn: 249336

llvm-svn: 249335

llvm-svn: 249334

Private page for status of Kona issues and papers. Will be deleted after the Kona meeting. Not to be linked to from other pages.

llvm-svn: 249333

llvm-svn: 249332

Patch by Jon Eyolfson.

llvm-svn: 249331

Summary:
We are currently only using these aliases for VOPC instructions,
but this helper will make it easier to use them everywhere.

These aliases allow for the automatic matching of instructions
with forced 32-bit encoding.  Eventually, we should be able to remove
the custom C++ logic we have for this in the assembler.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D13396

llvm-svn: 249330

include/clang/CodeGenABITypes.h is in meant to be included by external
users, but using a unique_ptr on the private CodeGenModule introduces a
dependency on the type definition that prevents such a use.

NFC

llvm-svn: 249328

Otherwise, the map will observe changes as long as MergeFunctions is alive. This
is bad because follow-up passes could replace-all-uses-with on the key of an
entry in the map. The value handle callback of ValueMap however asserts that the
key type matches.

rdar://22971893

llvm-svn: 249327

This matches the behavior of gold and bfd ld.

llvm-svn: 249326

llvm-svn: 249325

llvm-svn: 249324

This matches the behavior of bfd ld and gold. It is also convenient for
testing other changes.

llvm-svn: 249323

We were previously codegen'ing memcpy as regular load/store operations and
hoping that the register allocator would allocate registers in ascending order
so that we could apply an LDM/STM combine after register allocation. According
to the commit that first introduced this code (r37179), we planned to teach the
register allocator to allocate the registers in ascending order. This never got
implemented, and up to now we've been stuck with very poor codegen.

A much simpler approach for achieving better codegen is to create MEMCPY pseudo
instructions, attach scratch virtual registers to them and then, post register
allocation, expand the MEMCPYs into LDM/STM pairs using the scratch registers.
The register allocator will have picked arbitrary registers which we sort when
expanding the MEMCPY. This approach also avoids the need to repeatedly calculate
offsets which ultimately ought to be eliminated pre-RA in order to decrease
register pressure.

Fixes PR9199 and PR23768.

[This is based on Peter Collingbourne's r238473 which was reverted.]

Differential Revision: http://reviews.llvm.org/D13239

Change-Id: I727543c2e94136e0f80b8e22d5642d7b9ee5b458
Author: Peter Collingbourne <peter@pcc.me.uk>
llvm-svn: 249322

llvm-svn: 249321

llvm-svn: 249320

llvm-svn: 249319

No functional change intended.

llvm-svn: 249318

Differential Revision: http://reviews.llvm.org/D11219

llvm-svn: 249317

For RealFileSystem this is getcwd()/chdir(), the synthetic file systems can
make up one for themselves. OverlayFileSystem now synchronizes the working
directories when a new FS is added to the overlay or the overlay working
directory is set. This allows purely artificial file systems that have zero
ties to the underlying disks.

Differential Revision: http://reviews.llvm.org/D13430

llvm-svn: 249316

This is a simple file system tree of memory buffers that can be filled by a
client. In conjunction with an OverlayFS it can be used to make virtual
files accessible right next to physical files. This can be used as a
replacement for the virtual file handling in FileManager and which I intend
to remove eventually.

llvm-svn: 249315

No functionality change.

llvm-svn: 249314

"msr pan, #imm", while only 1-bit immediate values should be valid.
Changed encoding and decoding for msr pstate instructions.

Differential Revision: http://reviews.llvm.org/D13011

llvm-svn: 249313

llvm-svn: 249312

Summary:
An instruction like "(d)la $5, symbol+8" previously would have crashed the
assembler as it contains an expression. This is now fixed.
A few tests cases have also been changed to reflect these changes, however
these should only be syntax changes. Some new test cases have also been
added.

Patch by Scott Egerton.

Reviewers: vkalintiris, dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12760

llvm-svn: 249311

This streamlines the interface a bit and makes Status more immutable.
No functional change intended.

llvm-svn: 249310

This will be used soon from clang.

llvm-svn: 249309

[ARM] armv6m + netbsd. Tests are misssing for armv6m + darwin as well.

Differential Revision: http://reviews.llvm.org/D13217

llvm-svn: 249308

Like i386, Mips needs a versioned interceptor but must select GLIBC_2.2.

llvm-svn: 249307

Summary:

Reviewers: vkalintiris, atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D12234

llvm-svn: 249306

Summary: Add the second template argument to the unique_ptr mock, and update the matcher so that it only matches against cases where the second argument is the default.

Reviewers: klimek

Subscribers: alexfh, cfe-commits

Differential Revision: http://reviews.llvm.org/D13433

llvm-svn: 249305

Tag_Advanced_SIMD_arch is set correctly when targeting v8.1-a NEON.

Differential Revision: http://reviews.llvm.org/D13281

llvm-svn: 249304

This extends the work done in r233995 so that now getFragment (in addition to
getSection) also works for variable symbols.

With that the existing logic to decide if a-b can be computed works even if
a or b are variables. Given that, the expression evaluation can avoid expanding
variables as aggressively and that in turn lets the relocation code see the
original variable.

In order for this to work with the asm streamer, there is now a dummy fragment
per section. It is used to assign a section to a symbol when no other fragment
exists.

This patch is a joint work by Maxim Ostapenko andy myself.

llvm-svn: 249303

llvm-svn: 249302

OpenCL v1.1 s6.2.2: for the boolean value true, every bit in the result vector should be set.

This change treats the i1 value as signed for the purposes of performing the cast to integer,
and therefore sign extend into the result.

Patch by Neil Hickey!

http://reviews.llvm.org/D13349

llvm-svn: 249301

Summary: Now that we prioritize copying trivial types over using const-references where possible, I found some cases where, after the transformation, the loop was using the address of the local copy instead of the original object.

Reviewers: klimek

Subscribers: alexfh, cfe-commits

Differential Revision: http://reviews.llvm.org/D13431

llvm-svn: 249300

Reviewers: jaydeep.
Subscribers: lldb-commits.
Differential Revision: http://reviews.llvm.org/D13335

llvm-svn: 249299

There are two remaining buildbot failures that we'll have to
investigate before submitting this again.

llvm-svn: 249298

The entries are added if there are "_init" or "_fini" entries in
the symbol table respectively. According to the behavior of ld,
entries are inserted even for undefined symbols.

Symbol names can be overridden by using -init and -fini command
line switches. If used, these switches neither add new symbol table
entries nor require those symbols to be resolved.

Differential Revision: http://reviews.llvm.org/D13385

llvm-svn: 249297