1. Jun 06, 2019
    • Matt Arsenault's avatar
      Merging r359899: · 5b37d896
      Matt Arsenault authored
      ------------------------------------------------------------------------
      r359899 | arsenm | 2019-05-03 08:37:07 -0700 (Fri, 03 May 2019) | 7 lines
      
      AMDGPU: Select VOP3 form of sub
      
      The VOP3 form should always be the preferred selection form to be
      shrunk later.
      
      The r600 sub test needs to be split out because it asserts on the
      arguments in the new test during the calling convention lowering.
      ------------------------------------------------------------------------
      
      llvm-svn: 362654
      5b37d896
    • Matt Arsenault's avatar
      Merging r359898: · c8af2415
      Matt Arsenault authored
      ------------------------------------------------------------------------
      r359898 | arsenm | 2019-05-03 08:21:53 -0700 (Fri, 03 May 2019) | 3 lines
      
      AMDGPU: Support shrinking add with FI in SIFoldOperands
      
      Avoids test regression in a future patch
      ------------------------------------------------------------------------
      
      llvm-svn: 362648
      c8af2415
    • Matt Arsenault's avatar
      Correct test in r362634 · b73bafaf
      Matt Arsenault authored
      llvm-svn: 362635
      b73bafaf
    • Matt Arsenault's avatar
      Merging r359891: · 836f1e2b
      Matt Arsenault authored
      ------------------------------------------------------------------------
      r359891 | arsenm | 2019-05-03 07:40:10 -0700 (Fri, 03 May 2019) | 9 lines
      
      AMDGPU: Replace shrunk instruction with dummy implicit_def
      
      This was broken if the original operand was killed. The kill flag
      would appear on both instructions, and fail the verifier. Keep the
      kill flag, but remove the operands from the old instruction. This has
      an added benefit of really reducing the use count for future folds.
      
      Ideally the pass would be structured more like what PeepholeOptimizer
      does to avoid this hack to avoid breaking instruction iterators.
      ------------------------------------------------------------------------
      
      llvm-svn: 362634
      836f1e2b
  2. Jun 01, 2019
    • Tom Stellard's avatar
      Merging r360405: · 0489682e
      Tom Stellard authored
      ------------------------------------------------------------------------
      r360405 | maskray | 2019-05-09 22:51:00 -0700 (Thu, 09 May 2019) | 25 lines
      
      [PPC64] Define getThunkSectionSpacing() based on the range of R_PPC64_REL24
      
      Suggested by Sean Fertile and Peter Smith.
      
      Thunk section spacing decrease the total number of thunks. I measured a
      decrease of 1% or less in some large programs, with no perceivable
      slowdown in link time. Override getThunkSectionSpacing() to enable it.
      0x2000000 is the farthest point R_PPC64_REL24 can reach. I tried several
      numbers and found 0x2000000 works the best. Numbers near 0x2000000 work
      as well but let's just use the simpler number.
      
      As demonstrated by the updated tests, this essentially changes placement
      of most thunks to the end of the output section. We leverage this
      property to fix PR40740 reported by Alfredo Dal'Ava Júnior:
      
      The output section .init consists of input sections from several object
      files (crti.o crtbegin.o crtend.o crtn.o). Sections other than the last
      one do not have a terminator. With this patch, we create the thunk after
      the last .init input section and thus fix the issue. This is not
      foolproof but works quite well for such sections (with no terminator) in
      practice.
      
      Reviewed By: ruiu, sfertile
      
      Differential Revision: https://reviews.llvm.org/D61720
      ------------------------------------------------------------------------
      
      llvm-svn: 362274
      0489682e
    • Tom Stellard's avatar
      Merging part of r358975: · f1cacab4
      Tom Stellard authored
      Only merged the test changes in files that were also changed in r360405.
      
      ------------------------------------------------------------------------
      r358975 | maskray | 2019-04-23 04:47:28 -0700 (Tue, 23 Apr 2019) | 18 lines
      
      [PPC][PPC64] Improve some llvm-objdump -d -D tests
      
      Various improvement:
      
      Some offsets in disassembly are incorrect after several layout adjustment. Fix them.
      llvm-objdump -D should not be used. -D dumps unrelated non-text sections. Replace them with llvm-objdump -d, llvm-readelf -x, etc
      Many llvm-objdump -d tests use {{.*}} . Add the option --no-show-raw-insn to avoid check hex bytes.
      
      ppc64-long-branch.s does not need a shared object. Delete it.
      Make ppc64-ifunc.s check 2 ifuncs.
      
      Reviewers: ruiu, espindola
      
      Subscribers: emaste, nemanjai, arichardson, kbarton, jsji, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D60998
      ------------------------------------------------------------------------
      
      llvm-svn: 362273
      f1cacab4
  3. May 31, 2019
    • Matt Arsenault's avatar
      Merging r359883: · 5733e363
      Matt Arsenault authored
      ------------------------------------------------------------------------
      r359883 | arsenm | 2019-05-03 06:42:56 -0700 (Fri, 03 May 2019) | 6 lines
      
      AMDGPU: Fix incorrect commute with sub when folding immediates
      
      When a fold of an immediate into a sub/subrev required shrinking the
      instruction, the wrong VOP2 opcode was used. This was using the VOP2
      equivalent of the original instruction, not the commuted instruction
      with the inverted opcode.
      ------------------------------------------------------------------------
      
      llvm-svn: 362161
      5733e363
  4. May 30, 2019
    • Tom Stellard's avatar
      Merging r353865, r353866, and r353874: · e3dc222b
      Tom Stellard authored
      ------------------------------------------------------------------------
      r353865 | sfertile | 2019-02-12 09:48:22 -0800 (Tue, 12 Feb 2019) | 1 line
      
      [PowerPC] Fix printing of negative offsets in call instruction dissasembly.
      ------------------------------------------------------------------------
      
      ------------------------------------------------------------------------
      r353866 | sfertile | 2019-02-12 09:49:04 -0800 (Tue, 12 Feb 2019) | 4 lines
      
      [PPC64] Update tests to reflect change in printing of call operand. [NFC]
      
      The printing of branch operands for call instructions was changed to properly
      handle negative offsets. Updating the tests to reflect that.
      ------------------------------------------------------------------------
      
      ------------------------------------------------------------------------
      r353874 | sfertile | 2019-02-12 12:03:04 -0800 (Tue, 12 Feb 2019) | 5 lines
      
      Fix undefined behaviour in PPCInstPrinter::printBranchOperand.
      
      Fix the undefined behaviour introduced by my previous patch r353865 (left
      shifting a potentially negative value), which was caught by the bots that run
      UBSan.
      ------------------------------------------------------------------------
      
      llvm-svn: 362043
      e3dc222b
    • Tom Stellard's avatar
      Merging r359606: · f0bd5981
      Tom Stellard authored
      ------------------------------------------------------------------------
      r359606 | amyk | 2019-04-30 13:09:00 -0700 (Tue, 30 Apr 2019) | 12 lines
      
      [compiler-rt][builtins][sanitizers] Update compiler-rt test cases for
      compatibility with system's toolchain
      
      This patch aims to:
      - Guard ompiler-rt/test/builtins/Unit/compiler_rt_logb_test.c with macros, so
      the test runs on GLIBC versions >= 2.23. This is because the test relies on
      comparing its computed values to libm. Oolder versions might not compute to the
      same value as the compiler-rt value.
      - Update compiler-rt/test/sanitizer_common/TestCases/Posix/getpw_getgr.cc
      so that std::string is not used, since false positives may be detected.
      
      Differential Revision: https://reviews.llvm.org/D60644
      ------------------------------------------------------------------------
      
      llvm-svn: 362024
      f0bd5981
    • Tom Stellard's avatar
      Merging r353701: · e31804dc
      Tom Stellard authored
      ------------------------------------------------------------------------
      r353701 | mgorny | 2019-02-11 06:09:48 -0800 (Mon, 11 Feb 2019) | 8 lines
      
      [lldb] [lit] Fix finding lld-link when it is not in 'compiler dir'
      
      Fix the build helper to find lld-link via PATH lookup, rather than
      making a fragile assumption that it will be present in the 'compiler
      directory'.  This fixes tests on Gentoo where clang and lld
      are installed in different directories.
      
      Differential Revision: https://reviews.llvm.org/D58001
      ------------------------------------------------------------------------
      
      llvm-svn: 362017
      e31804dc
    • Tom Stellard's avatar
      Merging r353700: · d4463495
      Tom Stellard authored
      ------------------------------------------------------------------------
      r353700 | mgorny | 2019-02-11 06:09:43 -0800 (Mon, 11 Feb 2019) | 7 lines
      
      [lldb] [test] Skip lldb-mi test if LLDB_DISABLE_PYTHON is used
      
      Skip running lldb-mi tests when Python support is disabled.  This causes
      lldb-mi to unconditionally fail, and therefore all the relevant tests
      fail as well.
      
      Differential Revision: https://reviews.llvm.org/D58000
      ------------------------------------------------------------------------
      
      llvm-svn: 362016
      d4463495
  5. May 29, 2019
    • Tom Stellard's avatar
      Merging r354184: · c743d72d
      Tom Stellard authored
      ------------------------------------------------------------------------
      r354184 | ruiu | 2019-02-15 15:11:18 -0800 (Fri, 15 Feb 2019) | 10 lines
      
      [PPC64] Preserve LocalEntry when linking
      
      On PowerPC64, it is necessary to keep the LocalEntry bits in st_other,
      especially when -r is used. Otherwise, when the resulting object is used
      in a posterior linking, LocalEntry info will be unavailable and
      functions may be called through the wrong entrypoint.
      
      Patch by Leandro Lupori.
      
      Differential Revision: https://reviews.llvm.org/D56782
      ------------------------------------------------------------------------
      
      llvm-svn: 361921
      c743d72d
  6. May 24, 2019
    • Tom Stellard's avatar
      Merging r360825: · 11c3a5c0
      Tom Stellard authored
      ------------------------------------------------------------------------
      r360825 | atanasyan | 2019-05-15 15:27:19 -0700 (Wed, 15 May 2019) | 14 lines
      
      [mips] Always use _LARGEFILE_SOURCE / _FILE_OFFSET_BITS for building MIPS 32-bit
      
      When MIPS 32-bit compiler-rt is building on 32-bit host or using 32-bit
      `DLLVM_HOST_TRIPLE` the `_LARGEFILE_SOURCE` and the `_FILE_OFFSET_BITS=64`
      macros defined by statements from the `HandleLLVMOptions.cmake`. In case
      of building 32-bit libraries on 64-bit host using default host triple
      these macros are not defined. As a result assertions check a consistency
      between the `struct_kernel_stat_sz` constant and the `struct_kernel_stat_sz`
      start to fail.
      
      To resolve this problem and enable building both 32/64-bit versions
      of MIPS compiler-rt libraries on 64-bit host at once always explicitly
      define the `_LARGEFILE_SOURCE` and the `_FILE_OFFSET_BITS=64` macros
      for MIPS 32-bit.
      ------------------------------------------------------------------------
      
      llvm-svn: 361568
      11c3a5c0
    • Tom Stellard's avatar
      Merging r351523: · 1a198475
      Tom Stellard authored
      ------------------------------------------------------------------------
      r351523 | dylanmckay | 2019-01-17 22:10:41 -0800 (Thu, 17 Jan 2019) | 12 lines
      
      [AVR] Expand 8/16-bit multiplication to libcalls on MCUs that don't have hardware MUL
      
      This change modifies the LLVM ISel lowering settings so that
      8-bit/16-bit multiplication is expanded to calls into the compiler
      runtime library if the MCU being targeted does not support
      multiplication in hardware.
      
      Before this, MUL instructions would be generated on CPUs like the
      ATtiny85, triggering a CPU reset due to an illegal instruction at
      runtime.
      
      First raised in https://github.com/avr-rust/rust/issues/124.
      ------------------------------------------------------------------------
      
      llvm-svn: 361551
      1a198475
  7. May 17, 2019
    • Tom Stellard's avatar
      Merging r355038: · 9124fda0
      Tom Stellard authored
      ------------------------------------------------------------------------
      r355038 | joerg | 2019-02-27 13:53:14 -0800 (Wed, 27 Feb 2019) | 3 lines
      
      Default to Secure PLT on PPC for NetBSD and OpenBSD.
      This matches the default settings of clang.
      
      ------------------------------------------------------------------------
      
      llvm-svn: 360950
      9124fda0
    • Tom Stellard's avatar
      Merging r352806: · 4b1712f7
      Tom Stellard authored
      ------------------------------------------------------------------------
      r352806 | sbc | 2019-01-31 14:38:22 -0800 (Thu, 31 Jan 2019) | 5 lines
      
      [WebAssembly] MC: Fix for outputing wasm object to /dev/null
      
      Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
      
      Differential Revision: https://reviews.llvm.org/D57479
      ------------------------------------------------------------------------
      
      llvm-svn: 360949
      4b1712f7
  8. May 16, 2019
    • Tom Stellard's avatar
      Merging r360674: · 05288f50
      Tom Stellard authored
      ------------------------------------------------------------------------
      r360674 | russell_gallop | 2019-05-14 07:01:40 -0700 (Tue, 14 May 2019) | 7 lines
      
      [Driver][Windows] Add dependent lib argument for profile instr generate
      
      This is needed so lld-link can find clang_rt.profile when self hosting
      on Windows with PGO. Using clang-cl as a linker knows to add the library
      but self hosting, using -DCMAKE_LINKER=<...>/lld-link.exe doesn't.
      
      Differential Revision: https://reviews.llvm.org/D61742
      ------------------------------------------------------------------------
      
      llvm-svn: 360828
      05288f50
    • Tom Stellard's avatar
      Merging r354846: · bc6695ca
      Tom Stellard authored
      ------------------------------------------------------------------------
      r354846 | djg | 2019-02-25 21:20:19 -0800 (Mon, 25 Feb 2019) | 12 lines
      
      [WebAssembly] Properly align fp128 arguments in outgoing varargs arguments
      
      For outgoing varargs arguments, it's necessary to check the OrigAlign field
      of the corresponding OutputArg entry to determine argument alignment, rather
      than just computing an alignment from the argument value type. This is
      because types like fp128 are split into multiple argument values, with
      narrower types that don't reflect the ABI alignment of the full fp128.
      
      This fixes the printf("printfL: %4.*Lf\n", 2, lval); testcase.
      
      Differential Revision: https://reviews.llvm.org/D58656
      
      ------------------------------------------------------------------------
      
      llvm-svn: 360826
      bc6695ca
    • Tom Stellard's avatar
      Merging r360212: · e58d5a45
      Tom Stellard authored
      ------------------------------------------------------------------------
      r360212 | kamil | 2019-05-07 17:44:41 -0700 (Tue, 07 May 2019) | 6 lines
      
      Fix build on NetBSD 8.99.38
      
      With recent changes the dev/nvmm/nvmm_ioctl.h header is no longer
      a standalone NVMM header. Disable it until the NVMM operations will
      stabilize and be included in the ioctl(2) interceptors.
      
      ------------------------------------------------------------------------
      
      llvm-svn: 360811
      e58d5a45
    • Tom Stellard's avatar
      Merging r355141: · 9916d8de
      Tom Stellard authored
      ------------------------------------------------------------------------
      r355141 | rnk | 2019-02-28 13:05:41 -0800 (Thu, 28 Feb 2019) | 11 lines
      
      [COFF] Add address-taken import thunks to the fid table
      
      Summary: Fixes PR39799
      
      Reviewers: dmajor, hans
      
      Subscribers: jdoerfert, llvm-commits
      
      Tags: #llvm
      
      Differential Revision: https://reviews.llvm.org/D58739
      ------------------------------------------------------------------------
      
      llvm-svn: 360803
      9916d8de
    • Tom Stellard's avatar
      Merging r359569: · 35349ba7
      Tom Stellard authored
      ------------------------------------------------------------------------
      r359569 | russell_gallop | 2019-04-30 08:35:16 -0700 (Tue, 30 Apr 2019) | 7 lines
      
      Add llvm-profdata to LLVM_TOOLCHAIN_TOOLS
      
      This is required for using PGO on Windows but isn't in the Windows
      release packages. Windows packages are built with
      LLVM_INSTALL_TOOLCHAIN_ONLY so only includes llvm "tools" listed here.
      
      Differential Revision: https://reviews.llvm.org/D61317
      ------------------------------------------------------------------------
      
      llvm-svn: 360801
      35349ba7
    • Tom Stellard's avatar
      Merging r360099: · 2570e4bb
      Tom Stellard authored
      ------------------------------------------------------------------------
      r360099 | efriedma | 2019-05-06 16:21:59 -0700 (Mon, 06 May 2019) | 26 lines
      
      [ARM] Glue register copies to tail calls.
      
      This generally follows what other targets do. I don't completely
      understand why the special case for tail calls existed in the first
      place; even when the code was committed in r105413, call lowering didn't
      work in the way described in the comments.
      
      Stack protector lowering breaks if the register copies are not glued to
      a tail call: we have to insert the stack protector check before the tail
      call, and we choose the location based on the assumption that all
      physical register dependencies of a tail call are adjacent to the tail
      call. (See FindSplitPointForStackProtector.) This is sort of fragile,
      but I don't see any reason to break that assumption.
      
      I'm guessing nobody has seen this before just because it's hard to
      convince the scheduler to actually schedule the code in a way that
      breaks; even without the glue, the only computation that could actually
      be scheduled after the register copies is the computation of the call
      address, and the scheduler usually prefers to schedule that before the
      copies anyway.
      
      Fixes https://bugs.llvm.org/show_bug.cgi?id=41417
      
      Differential Revision: https://reviews.llvm.org/D60427
      
      ------------------------------------------------------------------------
      
      llvm-svn: 360793
      2570e4bb
    • Tom Stellard's avatar
      Merging r355621: · 3f38b9eb
      Tom Stellard authored
      ------------------------------------------------------------------------
      r355621 | petarj | 2019-03-07 10:28:44 -0800 (Thu, 07 Mar 2019) | 5 lines
      
      fix expected format in test/ELF/eh-frame-hdr-augmentation.s
      
      Follow-up for r355605.
      Fix expected format in test/ELF/eh-frame-hdr-augmentation.s
      
      ------------------------------------------------------------------------
      
      llvm-svn: 360792
      3f38b9eb
    • Tom Stellard's avatar
      Merging r358547: · 0eebd31d
      Tom Stellard authored
      ------------------------------------------------------------------------
      r358547 | ruiu | 2019-04-16 19:12:47 -0700 (Tue, 16 Apr 2019) | 9 lines
      
      Fix a crash bug caused by a nested call of parallelForEach.
      
      parallelForEach is not reentrant. We use parallelForEach to call
      each section's writeTo(), so calling the same function within writeTo()
      is not safe.
      
      Fixes https://bugs.llvm.org/show_bug.cgi?id=41508
      
      Differential Revision: https://reviews.llvm.org/D60757
      ------------------------------------------------------------------------
      
      llvm-svn: 360791
      0eebd31d
  9. May 15, 2019
    • Tom Stellard's avatar
      Merging r359883: · d9ccd0db
      Tom Stellard authored
      ------------------------------------------------------------------------
      r359883 | arsenm | 2019-05-03 06:42:56 -0700 (Fri, 03 May 2019) | 6 lines
      
      AMDGPU: Fix incorrect commute with sub when folding immediates
      
      When a fold of an immediate into a sub/subrev required shrinking the
      instruction, the wrong VOP2 opcode was used. This was using the VOP2
      equivalent of the original instruction, not the commuted instruction
      with the inverted opcode.
      ------------------------------------------------------------------------
      
      llvm-svn: 360752
      d9ccd0db
    • Tom Stellard's avatar
      Merging r356982: · 74cfa7ac
      Tom Stellard authored
      ------------------------------------------------------------------------
      r356982 | mstorsjo | 2019-03-26 02:02:44 -0700 (Tue, 26 Mar 2019) | 12 lines
      
      [llvm-dlltool] Set a proper machine type for weak symbol object files
      
      This makes GNU binutils not reject the libraries outright.
      
      GNU ld handles weak externals slightly differently though, so it
      can't use them for aliases in import libraries, but this makes GNU
      ld able to use the rest of the import libraries.
      
      LLD accepted object files with machine type 0 aka
      IMAGE_FILE_MACHINE_UNKNOWN.
      
      Differential Revision: https://reviews.llvm.org/D59742
      ------------------------------------------------------------------------
      
      llvm-svn: 360750
      74cfa7ac
    • Tom Stellard's avatar
      Merging r360512: · 0203f70b
      Tom Stellard authored
      ------------------------------------------------------------------------
      r360512 | ctopper | 2019-05-10 21:19:33 -0700 (Fri, 10 May 2019) | 5 lines
      
      [X86] Don't emit MOVNTDQA loads from fast-isel without SSE4.1.
      
      We were checking for SSE4.1 for FP types, but not integer 128-bit types.
      
      Fixes PR41837.
      ------------------------------------------------------------------------
      
      llvm-svn: 360749
      0203f70b
  10. May 04, 2019
    • Tom Stellard's avatar
      Merging r357885: · 7c1f15e3
      Tom Stellard authored
      ------------------------------------------------------------------------
      r357885 | ruiu | 2019-04-07 23:45:07 -0700 (Sun, 07 Apr 2019) | 13 lines
      
      Fix -emit-reloc against local symbols.
      
      Previously, we drop symbols starting with .L from the symbol table, so
      if there is a relocation that refers a .L symbol, it ended up
      referencing a null -- which happened to be interpreted as an absolute
      symbol.
      
      This patch copies all symbols including local ones if -emit-reloc is
      given.
      
      Fixes https://bugs.llvm.org/show_bug.cgi?id=41385
      
      Differential Revision: https://reviews.llvm.org/D60306
      ------------------------------------------------------------------------
      
      llvm-svn: 359956
      7c1f15e3
    • Tom Stellard's avatar
      Merging r359496: · 0d754fd0
      Tom Stellard authored
      ------------------------------------------------------------------------
      r359496 | mstorsjo | 2019-04-29 13:25:51 -0700 (Mon, 29 Apr 2019) | 8 lines
      
      [X86] Run CFIInstrInserter on Windows if Dwarf is used
      
      This is necessary since SVN r330706, as tail merging can include
      CFI instructions since then.
      
      This fixes PR40322 and PR40012.
      
      Differential Revision: https://reviews.llvm.org/D61252
      ------------------------------------------------------------------------
      
      llvm-svn: 359952
      0d754fd0
    • Tom Stellard's avatar
      Merging r359834: · 2a5c205c
      Tom Stellard authored
      ------------------------------------------------------------------------
      r359834 | evandro | 2019-05-02 15:01:39 -0700 (Thu, 02 May 2019) | 3 lines
      
      [AArch64] Update for Exynos
      
      Fix the forwarding of multiplication results for Exynos M4.
      ------------------------------------------------------------------------
      
      llvm-svn: 359946
      2a5c205c
    • Tom Stellard's avatar
      Merging r357376 and r359120: · 87c0dbbe
      Tom Stellard authored
      ------------------------------------------------------------------------
      r357376 | labath | 2019-04-01 01:11:46 -0700 (Mon, 01 Apr 2019) | 27 lines
      
      [Linux/x86] Fix writing of non-gpr registers on newer processors
      
      Summary:
      We're using ptrace(PTRACE_SETREGSET, NT_X86_XSTATE) to write all non-gpt
      registers on x86 linux. Unfortunately, this method has a quirk, where
      the kernel rejects all attempts to write to this area if one supplies a
      buffer which is smaller than the area size (even though the kernel will
      happily accept partial reads from it).
      
      This means that if the CPU supports some new registers/extensions that
      we don't know about (in my case it was the PKRU extension), we will fail
      to write *any* non-gpr registers, even those that we know about.
      
      Since this is a situation that's likely to appear again and again, I add
      code to NativeRegisterContextLinux_x86_64 to detect the runtime size of
      the area, and allocate an appropriate buffer. This does not mean that we
      will start automatically supporting all new extensions, but it does mean
      that the new extensions will not prevent the old ones from working.
      
      This fixes tests attempting to write to non-gpr registers on new intel
      processors (cca Kaby Lake Refresh).
      
      Reviewers: jankratochvil, davezarzycki
      
      Subscribers: lldb-commits
      
      Differential Revision: https://reviews.llvm.org/D59991
      ------------------------------------------------------------------------
      
      ------------------------------------------------------------------------
      r359120 | josepht | 2019-04-24 11:00:12 -0700 (Wed, 24 Apr 2019) | 15 lines
      
      [lldb] Use local definition of get_cpuid_count
      
      Summary:
      This is needed for gcc/cstdlib++ 5.4.0, where __get_cpuid_count is not
      defined in cpuid.h.
      
      Reviewers: labath
      
      Reviewed By: labath
      
      Subscribers: lldb-commits
      
      Tags: #lldb
      
      Differential Revision: https://reviews.llvm.org/D61036
      ------------------------------------------------------------------------
      
      llvm-svn: 359945
      87c0dbbe
  11. May 03, 2019
    • Tom Stellard's avatar
      Merging r357701: · 9465a4c3
      Tom Stellard authored
      ------------------------------------------------------------------------
      r357701 | mgorny | 2019-04-04 07:21:38 -0700 (Thu, 04 Apr 2019) | 8 lines
      
      [llvm] [cmake] Add additional headers only if they exist
      
      Modify the add_header_files_for_glob() function to only add files
      that do exist, rather than all matches of the glob.  This fixes CMake
      error when one of the include directories (which happen to include
      /usr/include) contain broken symlinks.
      
      Differential Revision: https://reviews.llvm.org/D59632
      ------------------------------------------------------------------------
      
      llvm-svn: 359857
      9465a4c3
    • Tom Stellard's avatar
      Merging r355607: · 68f2f7cc
      Tom Stellard authored
      ------------------------------------------------------------------------
      r355607 | petarj | 2019-03-07 08:31:08 -0800 (Thu, 07 Mar 2019) | 11 lines
      
      [DebugInfo] Fix the type of the formated variable
      
      Change the format type of *Personality and *LSDAAddress to PRIx64 since
      they are of type uint64_t.
      The problem was detected on mips builds, where it was printing junk values
      and causing test failure.
      
      Patch by Milos Stojanovic.
      
      Differential Revision: https://reviews.llvm.org/D58451
      
      ------------------------------------------------------------------------
      
      llvm-svn: 359851
      68f2f7cc
  12. Apr 26, 2019
    • Tom Stellard's avatar
      Merging r358885: · 604a4178
      Tom Stellard authored
      ------------------------------------------------------------------------
      r358885 | grimar | 2019-04-22 06:40:42 -0700 (Mon, 22 Apr 2019) | 8 lines
      
      [LLD][ELF] - Do not forget to use ch_addralign field after decompressing the sections.
      
      LLD did not use ELF::Chdr::ch_addralign for decompressed sections.
      This resulted in a broken output.
      
      Fixes https://bugs.llvm.org/show_bug.cgi?id=40482.
      
      Differential revision: https://reviews.llvm.org/D60959
      ------------------------------------------------------------------------
      
      llvm-svn: 359209
      604a4178
  13. Apr 23, 2019
    • Tom Stellard's avatar
      Merging r357506: · 7aa4dc94
      Tom Stellard authored
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      r357506 | atanasyan | 2019-04-02 11:03:31 -0700 (Tue, 02 Apr 2019) | 7 lines
      
      [driver][mips] Check both `gnuabi64` and `gnu` suffixes in `getMultiarchTriple`
      
      In case of N64 ABI toolchain paths migth have `mips-linux-gnuabi64`
      or `mips-linux-gnu` directory regardless of selected environment.
      Check both variants while detecting a multiarch triple.
      
      Fix for the bug https://bugs.llvm.org/show_bug.cgi?id=41204
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      llvm-svn: 358947
      7aa4dc94
    • Tom Stellard's avatar
      Merging r356039: · 1ff9bed8
      Tom Stellard authored
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      r356039 | atanasyan | 2019-03-13 04:04:38 -0700 (Wed, 13 Mar 2019) | 11 lines
      
      [MIPS][microMIPS] Fix PseudoMTLOHI_MM matching and expansion
      
      On micromips MipsMTLOHI is always matched to PseudoMTLOHI_DSP regardless
      of +dsp argument. This patch checks is HasDSP predicate is present for
      PseudoMTLOHI_DSP so PseudoMTLOHI_MM can be matched when appropriate.
      
      Add expansion of PseudoMTLOHI_MM instruction into a mtlo/mthi pair.
      
      Patch by Mirko Brkusanin.
      
      Differential Revision: http://reviews.llvm.org/D59203
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      llvm-svn: 358941
      1ff9bed8
    • Tom Stellard's avatar
      Merging r355825: · 047302e0
      Tom Stellard authored
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      r355825 | petarj | 2019-03-11 07:13:31 -0700 (Mon, 11 Mar 2019) | 10 lines
      
      [MIPS][microMIPS] Add a pattern to match TruncIntFP
      
      A pattern needed to match TruncIntFP was missing. This was causing multiple
      tests from llvm test suite to fail during compilation for micromips.
      
      Patch by Mirko Brkusanin.
      
      Differential Revision: https://reviews.llvm.org/D58722
      
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      llvm-svn: 358936
      047302e0
    • Tom Stellard's avatar
      Merging r354882: · 25b6e82d
      Tom Stellard authored
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      r354882 | atanasyan | 2019-02-26 06:45:17 -0800 (Tue, 26 Feb 2019) | 4 lines
      
      [mips] Emit `.module softfloat` directive
      
      This change fixes crash on an assertion in case of using
      `soft float` ABI for mips32r6 target.
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      llvm-svn: 358934
      25b6e82d
    • Tom Stellard's avatar
      Merging r354808: · 257c0105
      Tom Stellard authored
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      r354808 | nikic | 2019-02-25 10:54:17 -0800 (Mon, 25 Feb 2019) | 11 lines
      
      [Mips] Fix missing masking in fast-isel of br (PR40325)
      
      Fixes https://bugs.llvm.org/show_bug.cgi?id=40325 by zero extending
      (and x, 1) the condition before branching on it.
      
      To avoid regressing trivial cases, I'm combining emission of cmp+br
      sequences for the single-use + same block case (similar to what we
      do in x86). icmpbr1.ll still regresses due to the cross-bb usage
      of the condition.
      
      Differential Revision: https://reviews.llvm.org/D58576
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      llvm-svn: 358925
      257c0105
    • Tom Stellard's avatar
      Merging r356198: · 1cef8c24
      Tom Stellard authored
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      r356198 | abataev | 2019-03-14 13:36:00 -0700 (Thu, 14 Mar 2019) | 5 lines
      
      [OPENMP]Fix crash for the ordered(n) clause.
      
      If the doacross lop construct is used and the loop counter is declare
      outside of the loop, the compiler might crash trying to get the address
      of the loop counter. Patch fixes this problem.
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      llvm-svn: 358923
      1cef8c24