- Oct 27, 2020
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Alex Richardson authored
I noticed that alignment was no longer inferred as well after I last merged our CHERI fork from upstream. I opened this review before seeing that D88669 already fixes the same problem, so this commit simply adds the new test that I added as part of this change. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D89830
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Shimin Cui authored
This patch is to add the support of the value tracking of the alignment assume bundle. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D88669
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Sebastian Neubauer authored
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David Spickett authored
The statement that lldb-server can handle decimal and hex numbers is misleading. (it can only handle hex with 0x prefix) Mentioning non decimal numbers at all is just creating more confusion for anyone who tries to use them with lldb-server. Differential Revision: https://reviews.llvm.org/D89383
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Roman Lebedev authored
This is essentially finalizes a revert of rL155136, because nowadays the situation has improved, SCEV can model all these patterns well, and we canonicalize rotate-like patterns into a funnel shift intrinsics in InstCombine. So this should not cause any pessimization. I've verified the canonicalize-{a,l}shr-shl-to-masking.ll transforms with alive, which confirms that we can freely preserve exact-ness, and no-wrap flags. Profs: * base: https://rise4fun.com/Alive/gPQ * exact-ness preservation: https://rise4fun.com/Alive/izi * nuw preservation: https://rise4fun.com/Alive/DmD * nsw preservation: https://rise4fun.com/Alive/SLN6N * nuw nsw preservation: https://rise4fun.com/Alive/Qp7 Refs. https://reviews.llvm.org/D46760 -
Roman Lebedev authored
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Roman Lebedev authored
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Roman Lebedev authored
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Kazushi (Jam) Marukawa authored
Add VFAD/VFSB/VFMP/VFDV/VFSQRT/VFCP/VFCM/VFMAD/VFMSB/VFNMAD/VFNMSB/ VRCP/VRSQRT/VRSQRTNEX/VFIX/VFIXX/VFLT/VFLTX/VCVS/VCVD instructions. Add regression tests too. Also add additional AsmParser for VFIX and VFIXX instructions to parse their mnemonic. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D90166
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Kazushi (Jam) Marukawa authored
In the previous "Add vector shift instructions", I forgot to add regression tests for VSRL and VSRD instructions. This patch is adding them. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D90167
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Kirill Bobyrev authored
This is a breaking change in remote index protocol. Reviewed By: sammccall Differential Revision: https://reviews.llvm.org/D89851
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Mikhail Maltsev authored
This patch removes the necessity to access the SourceLocation internal representation in several places that use FoldingSet objects. Reviewed By: dexonsmith Differential Revision: https://reviews.llvm.org/D69844
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Georgii Rymar authored
--section-details/-t is a GNU readelf option that produce an output that is an alternative to --sections. Differential revision: https://reviews.llvm.org/D89304
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Med Ismail Bennani authored
Signed-off-by:Med Ismail Bennani <medismail.bennani@gmail.com>
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Jay Foad authored
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Raphael Isemann authored
TestQuoting's different test methods all build their own test binaries but we can just reuse the same test binary by merging all asserts into one method. This reduces the test runtime from 8 seconds to 4 seconds on my machine. This also removes the ability to have partial failures in this test, but given how rarely this code is touched this seems like a fair tradeoff (and we will be able to re-add this feature once we updated our test framework). Some other small changes: * Fixed that we cleanup "stdout.txt" instead of "output.txt" in the cleanup. * Fixed some formatting issues. * Call `build` instead of directly calling `buildDefault`.
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Georgii Rymar authored
Imagine the following declaration of a section: ``` Sections: - Name: .dynsym Type: SHT_DYNSYM AddressAlign: 0x1111111111111111 ``` The aligment is large and yaml2obj reports an error currently: "the desired output size is greater than permitted. Use the --max-size option to change the limit" This patch implements the "ShAddrAlign" key, which is similar to other "Sh*" keys we have. With it it is possible to override the `sh_addralign` field, ignoring the writing of alignment bytes. Differential revision: https://reviews.llvm.org/D90019 -
Florian Hahn authored
-Oz normally does not allow loop header duplication so this loop wouldn't be vectorized. However the vectorization pragma should override this and allow for loop rotation. rdar://problem/49281061 Original patch by Adam Nemet. Reviewed By: Meinersbur Differential Revision: https://reviews.llvm.org/D59832
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David Green authored
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Alex Zinenko authored
A recent commit introduced a new syntax for specifying builder arguments in ODS, which is better amenable to automated processing, and deprecated the old form. Transition all dialects as well as Linalg ODS generator to use the new syntax. Add a deprecation notice to ODS generator. Reviewed By: rriddle, jpienaar Differential Revision: https://reviews.llvm.org/D90038
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Tyker authored
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Haojian Wu authored
to demonstrate it works for some cases. Differential Revision: https://reviews.llvm.org/D90140
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Kiran Chandramohan authored
Recent change updated branch weights to use i64 instead of i32. Updating llvm.mlir test to match this change. https://reviews.llvm.org/D88609
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Sam McCall authored
This is ugly (layering violation) but we can clean it up once we know it works in CI.
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Max Kazantsev authored
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Sam McCall authored
Copy/move break invariants (move could be fixed). Node/Tree should have no public constructors, they're abstract. Destructor is private to enforce arena allocation. (Making the constructor of all subclasses private doesn't seem worthwhile) Differential Revision: https://reviews.llvm.org/D90163
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Craig Topper authored
This uses PreprocessISelDAG to replace the constant before instruction selection instead of matching opcodes after. Reviewed By: pengfei Differential Revision: https://reviews.llvm.org/D89178
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Wei Wang authored
In small code model, program and its symbols are linked in the lower 2 GB of the address space. Try encoding global address even when the range is unknown in such case. Differential Revision: https://reviews.llvm.org/D89341
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Christian Sigg authored
The TypeID instance was moved in D89153. It wasn't caught that it broke MLIR pretty printers because pre-merge checks don't run check-debuginfo. Avoid disabling all MLIR printers in case this happens again by catching the exception. Reviewed By: stellaraccident Differential Revision: https://reviews.llvm.org/D90191
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Max Kazantsev authored
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Nathan Ridge authored
Differential Revision: https://reviews.llvm.org/D90134
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Nathan Ridge authored
sccache is a compiler caching tool similar to ccache. Differential Revision: https://reviews.llvm.org/D88790
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Serguei Katkov authored
GVN Load PRE can split the backedge causing breaking the loop structure where the latch contains the conditional branch with for example induction variable. Different optimizations expect this form of the loop, so it is better to preserve it for some time. This CL adds an option to control an ability to split backedge. Default value is true so technically it is NFC and current behavior is not changed. Reviewers: fedor.sergeev, mkazantsev, nikic, reames, fhahn Reviewed By: mkazasntsev Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D89854
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Max Kazantsev authored
Even if the exact exit count is unknown, we can still prove that this exit will not be taken. If we can prove that the predicate is monotonic, fulfilled on first & last iteration, and no overflow happened in between, then the check can be removed. Differential Revision: https://reviews.llvm.org/D87832 Reviewed By: apilipenko
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Shilei Tian authored
[Clang][OpenMP] Avoid unnecessary privatization of mapper array when there is no user defined mapper In current implementation, if it requires an outer task, the mapper array will be privatized no matter whether it has mapper. In fact, when there is no mapper, the mapper array only contains number of nullptr. In the libomptarget, the use of mapper array is `if (mappers_array && mappers_array[i])`, which means we can directly set mapper array to nullptr if there is no mapper. This can avoid unnecessary data copy. In this patch, the data privatization will not be emitted if the mapper array is nullptr. When it comes to the emit of task body, the nullptr will be used directly. Reviewed By: jdoerfert Differential Revision: https://reviews.llvm.org/D90101
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Jonas Devlieghere authored
On macOS, the read and pread syscalls return EINVAL when the number of bytes to read exceeds INT32_MAX: https://github.com/apple/darwin-xnu/blob/a449c6a3b8014d9406c2ddbdc81795da24aa7443/bsd/kern/sys_generic.c#L355 rdar://68751407 Differential revision: https://reviews.llvm.org/D90201
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Arthur Eubanks authored
Test copied from noalias-calls.ll with small changes. Reviewed By: asbirlea Differential Revision: https://reviews.llvm.org/D89609
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Arthur Eubanks authored
CallInst::updateProfWeight() creates branch_weights with i64 instead of i32. To be more consistent everywhere and remove lots of casts from uint64_t to uint32_t, use i64 for branch_weights. Reviewed By: davidxl Differential Revision: https://reviews.llvm.org/D88609
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Arthur Eubanks authored
This reverts commit 504fbec7. Test failure.
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Bing1 Yu authored
[CostModel][X86] teach TTI calculate cost of chain of vector inserts/extracts more precisely and correctly:In each 128-lane, if there is at least one index is demanded and not all indices are demanded... In each 128-lane, if there is at least one index is demanded and not all indices are demanded and this 128-lane is not the first 128-lane of the legalized-vector, then this 128-lane needs a extracti128; If in each 128-lane, there is at least one index is demanded, this 128-lane needs a inserti128. The following cases will help you build a better understanding: Assume we insert several elements into a v8i32 vector in avx2, Case#1: inserting into 1th index needs vpinsrd + inserti128 Case#2: inserting into 5th index needs extracti128 + vpinsrd + inserti128 Case#3: inserting into 4,5,6,7 index needs 4*vpinsrd + inserti128. Reviewed By: pengfei, RKSimon Differential Revision: https://reviews.llvm.org/D89767
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