- Dec 21, 2020
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Kazu Hirata authored
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Nikita Popov authored
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- Dec 20, 2020
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ShihPo Hung authored
Differential Revision: https://reviews.llvm.org/D93286
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Simon Pilgrim authored
Add missing llvm_unreachable()'s after each all-enums switch statement.
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Chris Warner authored
Modify the cppcoreguidelines-pro-type-member-init checker to ignore warnings from the move and copy-constructors when they are compiler defined with `= default` outside of the type declaration. Reported as [LLVM bug 36819](https://bugs.llvm.org/show_bug.cgi?id=36819) Reviewed By: malcolm.parsons Differential Revision: https://reviews.llvm.org/D93333
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Michał Górny authored
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Hsiangkai Wang authored
Define vector vfwmul intrinsics and lower them to V instructions. We work with @rogfer01 from BSC to come out this patch. Authored-by:
Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by:
Hsiangkai Wang <kai.wang@sifive.com> Differential Revision: https://reviews.llvm.org/D93584
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Hsiangkai Wang authored
Define vector vfwadd/vfwsub intrinsics and lower them to V instructions. We work with @rogfer01 from BSC to come out this patch. Authored-by:
Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by:
Hsiangkai Wang <kai.wang@sifive.com> Differential Revision: https://reviews.llvm.org/D93583
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Hsiangkai Wang authored
Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics and lower them to V instructions. We work with @rogfer01 from BSC to come out this patch. Authored-by:
Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by:
Hsiangkai Wang <kai.wang@sifive.com> Differential Revision: https://reviews.llvm.org/D93581
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Hsiangkai Wang authored
Define vector vfmul/vfdiv/vfrdiv intrinsics and lower them to V instructions. We work with @rogfer01 from BSC to come out this patch. Authored-by:
Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by:
Hsiangkai Wang <kai.wang@sifive.com> Differential Revision: https://reviews.llvm.org/D93580
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Pavel Labath authored
It works, and it should be more stable than forward connections.
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Gnimuc authored
This was likely an oversight in https://reviews.llvm.org/D92292 Reviewed By: stellaraccident Differential Revision: https://reviews.llvm.org/D93588
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Reid Kleckner authored
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Andrew Litteken authored
Extracted regions can have both inputs and outputs. In addition, the CodeExtractor removes inputs that are only used in llvm.assumes, and sunken allocas (values are used entirely in the extracted region as denoted by lifetime intrinsics). We also cannot combine sections that have different constants in the same structural location, and these constants will have to elevated to argument. This patch deduplicates extracted functions that only have inputs and non of the special cases. We test that correctly deduplicate in: test/Transforms/IROutliner/outlining-same-globals.ll test/Transforms/IROutliner/outlining-same-constants.ll test/Transforms/IROutliner/outlining-different-structure.ll Reviewers: jroelofs, paquette Differential Revision: https://reviews.llvm.org/D86978
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Andrew Litteken authored
Missing reviewers and differential revision in commit message. This reverts commit 5cdc4f57.
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Andrew Litteken authored
Extracted regions can have both inputs and outputs. In addition, the CodeExtractor removes inputs that are only used in llvm.assumes, and sunken allocas (values are used entirely in the extracted region as denoted by lifetime intrinsics). We also cannot combine sections that have different constants in the same structural location, and these constants will have to elevated to argument. This patch deduplicates extracted functions that only have inputs and non of the special cases. We test that correctly deduplicate in: test/Transforms/IROutliner/outlining-same-globals.ll test/Transforms/IROutliner/outlining-same-constants.ll test/Transforms/IROutliner/outlining-different-structure.ll
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Craig Topper authored
These properties aren't additive. They are closer to ReadOnly and WriteOnly. The default is ReadWrite. ReadMem cancels the write property and WriteMem cancels the read property. Combining them leaves neither. This patch checks that when we process WriteMem, the Mod flag is still set. And for ReadMem we check that the Ref flag set still set. I've updated 2 target intrinsics that were combining these properties. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D93571
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Greg McGary authored
The common encodings table holds only 127 entries. The encodings index for compact entries is 8 bits wide, and indexes 127..255 are stored locally to each second-level page. Prior to this diff, lld would `fatal()` if encodings overflowed the 127 limit. This diff populates a per-second-level-page encodings table as needed. When the per-page encodings table hits its limit, we must terminate the page. If such early termination would consume fewer entries than a regular (non-compact) encoding page, then we prefer the regular format. Caveat: one reason the common-encoding table might overflow is because of DWARF debug-info references, which are not yet implemented and will come with a later diff. Differential Revision: https://reviews.llvm.org/D93267
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Roman Lebedev authored
... for conditional branch case
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Roman Lebedev authored
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Roman Lebedev authored
... for the custom case returning void.
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Roman Lebedev authored
... for the general case of returning a value.
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Roman Lebedev authored
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Roman Lebedev authored
[SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondBranch() already knows how to preserve DomTree ... so just ensure that we pass DomTreeUpdater it into it. Apparently, there were no dedicated tests just for that functionality, so i'm adding one here.
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Roman Lebedev authored
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Roman Lebedev authored
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Roman Lebedev authored
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Roman Lebedev authored
Still boring, simply drop all edges to successors of DomBlock, and add an edge to to BB instead.
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Roman Lebedev authored
And that exposes that a number of tests don't *actually* manage to maintain DomTree validity, which is inline with my observations. Once again, SimlifyCFG pass currently does not require/preserve DomTree by default, so this is effectively NFC.
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Andrew Litteken authored
inputs. Extracted regions can have both inputs and outputs. In addition, the CodeExtractor removes inputs that are only used in llvm.assumes, and sunken allocas (values are used entirely in the extracted region as denoted by lifetime intrinsics). We also cannot combine sections that have different constants in the same structural location, and these constants will have to elevated to argument. This patch limits the extracted regions to those that only require inputs, and do not have any other special cases. We test that we do not outline the wrong constants in: test/Transforms/IROutliner/outliner-different-constants.ll test/Transforms/IROutliner/outliner-different-globals.ll test/Transforms/IROutliner/outliner-constant-vs-registers.ll We test that correctly outline in: test/Transforms/IROutliner/outlining-same-globals.ll test/Transforms/IROutliner/outlining-same-constants.ll test/Transforms/IROutliner/outlining-different-structure.ll Reviewers: paquette, plofti Differential Revision: https://reviews.llvm.org/D86977
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Craig Topper authored
[X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga/skinit with or without the fixed register operands These instructions read their inputs from fixed registers rather than using a modrm byte. We shouldn't require the user to list them when parsing assembly. This matches the GNU assembler. This patch adds InstAliases so we can accept either form. It also changes the printing code to use the form without registers. This will change the behavior of llvm-objdump, but should be consistent with binutils objdump. This also matches what we already do in LLVM for clzero and monitorx which also used fixed registers. I need to add and improve tests before this can be commited. The disassembler tests exist, but weren't checking the fixed register so they pass before and after this change. Fixes https://github.com/ClangBuiltLinux/linux/issues/1216 Differential Revision: https://reviews.llvm.org/D93524
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Kazu Hirata authored
The last use of getInstTypePair with two parameters was removed on on Jan 9, 2015 in commit 33d7f9de. It seems to be unused since then.
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Kazu Hirata authored
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Juneyoung Lee authored
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- Dec 19, 2020
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Mark de Wever authored
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Zakk Chen authored
Define vlxe/vsxe intrinsics and lower to vlxei<EEW>/vsxei<EEW> instructions. We work with @rogfer01 from BSC to come out this patch. Authored-by:
Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by:
Zakk Chen <zakk.chen@sifive.com> Differential Revision: https://reviews.llvm.org/D93471
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Kristof Beyls authored
The command line syntax is identical to the -mharden-sls= command line syntax for AArch64 targets. Differential Revision: https://reviews.llvm.org/D93221
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Kristof Beyls authored
As a linker is allowed to clobber r12 on function calls, the code transformation that hardens indirect calls is not correct in case a linker does so. Similarly, the transformation is not correct when register lr is used. This patch makes sure that r12 or lr are not used for indirect calls when harden-sls-blr is enabled. Differential Revision: https://reviews.llvm.org/D92469
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Kristof Beyls authored
To make sure that no barrier gets placed on the architectural execution path, each indirect call calling the function in register rN, it gets transformed to a direct call to __llvm_slsblr_thunk_mode_rN. mode is either arm or thumb, depending on the mode of where the indirect call happens. The llvm_slsblr_thunk_mode_rN thunk contains: bx rN <speculation barrier> Therefore, the indirect call gets split into 2; one direct call and one indirect jump. This transformation results in not inserting a speculation barrier on the architectural execution path. The mitigation is off by default and can be enabled by the harden-sls-blr subtarget feature. As a linker is allowed to clobber r12 on function calls, the above code transformation is not correct in case a linker does so. Similarly, the transformation is not correct when register lr is used. Avoiding r12/lr being used is done in a follow-on patch to make reviewing this code easier. Differential Revision: https://reviews.llvm.org/D92468
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Kristof Beyls authored
The only non-trivial consideration in this patch is that the formation of TBB/TBH instructions, which is done in the constant island pass, does not understand the speculation barriers inserted by the SLSHardening pass. As such, when harden-sls-retbr is enabled for a function, the formation of TBB/TBH instructions in the constant island pass is disabled. Differential Revision: https://reviews.llvm.org/D92396
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