See #64620 - does not fix the issue but improves the generated code a
bit.

This optimization tries to optimize bitcasts from `<N x i1>` to iN, but
currently also triggers for `<N x i1>` to `<M x iK>` bitcasts, if custom
lowering has been requested for these for an unrelated reason. Fix this
by explicitly checking that the result type is scalar.

Fixes https://github.com/llvm/llvm-project/issues/81216.

This has been subsumed by simplifyAndOrWithOpReplaced().

This reverts commit f5d71b79.

[libc++] Move the contents of `__fwd/get.h` into the forward declaration headers they actually belong to (#81368)

This brings us closer to one forward declaring header per public header.

[XiangShan](https://github.com/OpenXiangShan/XiangShan) is an
open-source high-performance RISC-V processor.

This PR adds the schedule model for XiangShan-NanHu, the 2nd Gen core of
the XiangShan processor series.
Overview:
https://xiangshan-doc.readthedocs.io/zh-cn/latest/integration/overview/

It is based on the patch [D122556](https://reviews.llvm.org/D122556

) by
@SForeKeeper. The original patch hasn't been updated for a long time and
it is out of sync with the current RTL design.

---------

Co-authored-by: SForeKeeper <zkliu6@gmail.com>

We can't skip calling getFormattingLangOpts() because LangOpts is not
initialized in the unit tests.

Same as with v4i8 types, we should not be using PerformEXTRACTCombine
for v8i8 types.

Restore getFormattingLangOpts().

Shift and extend modifiers are parsed as separate operands. When a
symbol operand of a branch instruction has such a "bad" name,
AArch64AsmParser will report an error.

```
% cat a.c
void lsl(); void lsr(); void asr(); void ror(); void uxtb(); void sxtx();
void foo() { lsl(); asr(); asr(); ror(); uxtb(); sxtx(); }
% clang --target=aarch64 -c -save-temps a.c
a.s:15:8: error: expected #imm after shift specifier
        bl      lsl
                   ^
a.s:16:8: error: expected #imm after shift specifier
        bl      asr
                   ^
a.s:17:8: error: expected #imm after shift specifier
        bl      asr
                   ^
a.s:18:8: error: expected #imm after shift specifier
        bl      ror
                   ^
a.s:19:5: error: expected label or encodable integer pc offset
        bl      uxtb
                ^
a.s:20:5: error: expected label or encodable integer pc offset
        bl      sxtx
                ^
```

In contrast, gas correctly parses these instructions.

Fix #79729 by parsing shift/extend modifier after an immediate
value/register

This reverts commit 03f57199.

We can't hide getFormattingLangOpts() as it's used by other tools.

There are a couple of open questions on what we should do for A14, so I'll
leave that off for now.

https://github.com/llvm/llvm-project/pull/81325#issuecomment-1937489565

Expand64BitShift was always dropping to generic shift legalization if the shift amount type was larger than i64, even if the constant shift amount was actually very small. I've adjusted the constant bounds checks to work with APInt types so we can always perform the comparison.

This results in the MVE long shift instructions being used more often, and it looks like this is preventing some additional combines from happening. This could be addressed in the future.

This came about while I was trying to extend the DAGTypeLegalizer::ExpandShift* helpers and need to move to consistently using the legal shift amount types instead of reusing the shift amount type from the original wider shift.

This patch makes all bit-fields in `DefaultedFunctionKind` of type `unsigned`, which brings `sizeof(DefaultedFunctionKind)` down from 8 to 4 when compiling Clang for Microsoft ABI.

This effectively reverts commit
9ff0cc7e

. For some reason "git revert"
lead to "no changes" after fixing conflicts, so a clean revert was not
possible.

The original issue (#57022) is no longer reproducible even with this
patch, so we can remove the suppression.

This is in line with our goal to make -Wenum-constexpr-conversion a
non-downgradeable error, see #59036.

Co-authored-by: Carlos Gálvez <carlos.galvez@zenseact.com>

Make all bit-fields of type `unsigned`, which reduces amoung of padding on Microsoft ABI, resulting in potentially lesser size of the object.

Make them all of the same `unsigned` type, which brings `sizeof(RawComment)` down from 12 to 4 when compiling Clang for Microsoft ABI.

The arithmetic and comparison operators are ill-formed when R1 or R2 is
not a std::ratio.

Fixes: https://github.com/llvm/llvm-project/issues/63753

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

This helps debuggers to display values in bit-fields in a more helpful way.

I believe these should be selectable via tablegen patterns nowadays.

This helps the fp reductions, moving the constant operands to the RHS
which in turn helps simplify away fadd -0.0 and fmul 1.0.

First step in fixing #76772.

This PR considers the default branch as a case branch. This will give
the unreachable default branch fair consideration.