- Sep 18, 2020
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Nikita Popov authored
Enable canonicalization of SPF_ABS and SPF_NABS to the abs intrinsic. To be conservative, the one-use check on the comparison is retained, this may be relaxed if all goes well. It's pretty likely that this will uncover places that missing handling for the abs() intrinsic. Please report any seen performance regressions. Differential Revision: https://reviews.llvm.org/D87188
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Whitney Tsang authored
Summary: Allow unroll and jam loops forced by user. LoopUnrollAndJamPass is still disabled by default in the NPM pipeline, and can be controlled by -enable-npm-unroll-and-jam. Reviewed By: Meinersbur, dmgreen Differential Revision: https://reviews.llvm.org/D87786
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Nikita Popov authored
We already use that assume(X) implies X==true, do the same for assume(!X) implying X==false. This fixes PR47496.
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Nikita Popov authored
The other assume tests seem to be dealing with equalities in particular. Test implication for the condition itself, especially the negated case from PR47496.
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Florian Hahn authored
This adds test cases for PR40961 and PR47247. They illustrate cases in which the max backedge-taken count can be improved by information from the loop guards.
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Victor Huang authored
This is a follow up patch for https://reviews.llvm.org/D63676 to enable the feature when using pgo. Differential Revision: https://reviews.llvm.org/D85240
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Vitaly Buka authored
X86 can use xmm registers for pointers operations. e.g. for std::swap. I don't know yet if it's possible on other platforms. NT_X86_XSTATE includes all registers from NT_FPREGSET so the latter used only if the former is not available. I am not sure how reasonable to expect that but LLD has such fallback in NativeRegisterContextLinux_x86_64::ReadFPR. Reviewed By: morehouse Differential Revision: https://reviews.llvm.org/D87754
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Jon Roelofs authored
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LLVM GN Syncbot authored
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Andrew Litteken authored
This introduces the IRInstructionMapper, and the associated wrapper for instructions, IRInstructionData, that maps IR level Instructions to unsigned integers. Mapping is done mainly by using the "isSameOperationAs" comparison between two instructions. If they return true, the opcode, result type, and operand types of the instruction are used to hash the instruction with an unsigned integer. The mapper accepts instruction ranges, and adds each resulting integer to a list, and each wrapped instruction to a separate list. At present, branches, phi nodes are not mapping and exception handling is illegal. Debug instructions are not considered. The different mapping schemes are tested in unittests/Analysis/IRSimilarityIdentifierTest.cpp Recommit of: b04c1a9d Differential Revision: https://reviews.llvm.org/D86968
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Cameron McInally authored
Map fixed length VSELECT to its Scalable equivalent. Differential Revision: https://reviews.llvm.org/D85364
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Reid Kleckner authored
Extending the lifetime of these type index mappings does increase memory usage (+2% in my case), but it decouples type merging from symbol merging. This is a pre-requisite for two changes that I have in mind: - parallel type merging: speeds up slow type merging - defered symbol merging: avoid heap allocating (relocating) all symbols This eliminates CVIndexMap and moves its data into TpiSource. The maps are also split into a SmallVector and ArrayRef component, so that the ipiMap can alias the tpiMap for /Z7 object files, and so that both maps can simply alias the PDB type server maps for /Zi files. Splitting TypeServerSource establishes that all input types to be merged can be identified with two 32-bit indices: - The index of the TpiSource object - The type index of the record This is useful, because this information can be stored in a single 64-bit atomic word to enable concurrent hashtable insertion. One last change is that now all objec...
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Amara Emerson authored
In order to not unnecessarily promote the source vector to greater than our native vector size of 128b, I've added some cascading rules to widen based on the number of elements.
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Amara Emerson authored
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Sanjay Patel authored
As discussed in: https://llvm.org/PR47558 ...there are several potential fixes/follow-ups visible in the test case, but this is the quickest and safest fix of the perf regression.
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Craig Topper authored
[X86] Don't match x87 register inline asm constraints unless the VT is floating point or its a clobber The register class picked will be the RFP80 register class which has a f80 VT. The code in SelectionDAGBuilder that generates copies around inline assembly doesn't know how to handle an integer and floating point type of different bit widths. The test case is derived from this https://godbolt.org/z/sEa659 which gcc accepts but clang crashes on. This patch just gives a more graceful error. I'm not sure if the single element struct case is special in gcc. Adding another field to the struct makes gcc reject it. If we want to support this correctly I think we need a change in the frontend to give us the true element type. Right now the frontend just realizes the constraint can take a memory argument so creates an integer type of the same size and bitcasts. Differential Revision: https://reviews.llvm.org/D87485
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Navdeep Kumar authored
Add support to tile affine.for ops with parametric sizes (i.e., SSA values). Currently supports hyper-rectangular loop nests with constant lower bounds only. Move methods - moveLoopBody(*) - getTileableBands(*) - checkTilingLegality(*) - tilePerfectlyNested(*) - constructTiledIndexSetHyperRect(*) to allow reuse with constant tile size API. Add a test pass -test-affine -parametric-tile to test parametric tiling. Differential Revision: https://reviews.llvm.org/D87353
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Abhishek Varma authored
Add support for return values in affine.for yield along the same lines as scf.for and affine.parallel. Signed-off-by:
Abhishek Varma <abhishek.varma@polymagelabs.com> Differential Revision: https://reviews.llvm.org/D87437
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Yaxun (Sam) Liu authored
This reverts commit ee5519d3.
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Yaxun (Sam) Liu authored
This reverts commit 7f1f89ec. This reverts commit 40df06cd.
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Sanjay Patel authored
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Sanjay Patel authored
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Jinsong Ji authored
We shouldn't assume python exists, we should let lit to decide whether it is python or python3 and expand the path.
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Adrian Prantl authored
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jerryyin authored
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Raul Tambre authored
Instead of relying on whether a certain identifier is a builtin, introduce BuiltinAttr to specify a declaration as having builtin semantics. This fixes incompatible redeclarations of builtins, as reverting the identifier as being builtin due to one incompatible redeclaration would have broken rest of the builtin calls. Mostly-compatible redeclarations of builtins also no longer have builtin semantics. They don't call the builtin nor inherit their attributes. A long-standing FIXME regarding builtins inside a namespace enclosed in extern "C" not being recognized is also addressed. Due to the more correct handling attributes for builtin functions are added in more places, resulting in more useful warnings. Tests are updated to reflect that. Intrinsics without an inline definition in intrin.h had `inline` and `static` removed as they had no effect and caused them to no longer be recognized as builtins otherwise. A pthread_create() related test is XFAIL-ed, as it relied on it being recognized as a builtin based on its name. The builtin declaration syntax is too restrictive and doesn't allow custom structs, function pointers, etc. It seems to be the only case and fixing this would require reworking the current builtin syntax, so this seems acceptable. Fixes PR45410. Reviewed By: rsmith, yutsumi Differential Revision: https://reviews.llvm.org/D77491
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Matt Morehouse authored
Reviewed By: vitalybuka Differential Revision: https://reviews.llvm.org/D87801
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Eduardo Caldas authored
Prior to this change `createTree` could not create arbitrary syntax trees. Now it dispatches to the constructor of the concrete syntax tree according to the `NodeKind` passed as argument. This allows reuse inside the Synthesis API. # Please enter the commit message for your changes. Lines starting Differential Revision: https://reviews.llvm.org/D87820
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Bogdan Graur authored
Reviewed By: bkramer Differential Revision: https://reviews.llvm.org/D87838
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Sanjay Patel authored
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- Sep 17, 2020
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David Green authored
This extends the distributing postinc code in load/store optimizer to also handle the case where there is an existing pre/post inc instruction, where subsequent instructions can be modified to use the adjusted offset from the increment. This can save us having to keep the old register live past the increment instruction. Differential Revision: https://reviews.llvm.org/D83377
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Amara Emerson authored
For <8 x s32> = fptrunc <8 x s64> the fewerElementsVector action tries to break down the source vector into the final source vectors of <2 x s64> using unmerge. This fixes a crash due to using the wrong number of elements for the breakdown type. Also add some legalizer tests for explicitly G_FPTRUNC which we didn't have. Differential Revision: https://reviews.llvm.org/D87814
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Hanhan Wang authored
Fold the operation if the source is a scalar constant or splat constant. Update transform-patterns-matmul-to-vector.mlir because the broadcast ops are folded in the conversion. Reviewed By: aartbik Differential Revision: https://reviews.llvm.org/D87703
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Yaxun (Sam) Liu authored
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Simon Pilgrim authored
Already included in ModuloSchedule.h
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Matt Morehouse authored
This reverts commit 559f9198 due to bot failure.
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Max Kazantsev authored
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Valentin Clement authored
Lower OpenACCLoopConstruct and most of the clauses to the OpenACC acc.loop operation in MLIR. This patch refelcts what can be upstream from PR flang-compiler/f18-llvm-project#419 Reviewed By: SouraVX Differential Revision: https://reviews.llvm.org/D87389
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Valentin Clement authored
This patch change the type of operands async, wait, numGangs, numWorkers and vectorLength from index to AnyInteger to fit with acc.loop and the OpenACC specification. Reviewed By: ftynse Differential Revision: https://reviews.llvm.org/D87712
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David Green authored
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