[LLVM][NVPTX] Add BF16 vector instruction and fix lowering rules (#69415)
Add support for bf16x2 instructions such as setp, fneg, fabs, etc;
Fix the instructions that were not differentiated between sm_80 and
sm_90 support, such as fpround etc.
Add more bf16 test cases to ensure the correct behavior.
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Co-authored-by:
shenhan03 <shenhan03@kuaishou.com>
parent
a31538d2
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