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Unverified Commit c4bac7f7 authored by CarolineConcatto's avatar CarolineConcatto Committed by GitHub
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[LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (#77665) 

…VE2.1 for spill/fill

When possible the spill/fill register in Frame Lowering uses the ld/st
consecutive pairs available in sme or sve2.1.
parent b27eb0ae
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