Skip to content
GitLab
Commit c3b7ab72 authored by Simon Pilgrim's avatar Simon Pilgrim
Browse files

[X86] Fix Store AGU/Memory ports on IceLakeServer model 

The IceLakeServer model was directly copied from SkylakeServer model and we didn't do much to adjust the changes in port layout etc.

IceLake handles all store AGU on ports 7/8 (and not 2/3/7 like Skylake), store memory ops are handled on ports 4/9 (and not just port 4)

Fixes #62602
parent ee72359c
Expand all Hide whitespace changes
Inline Side-by-side
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment