[RISCV] Add patterns of SET[U]LT_VI for STECC forms
This patch optmizes "li a0, 5
vmsgt[u].vx v10, v8, a0"
-> "vmsgt[u].vi v10, v8, 5"
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D118014
parent
81793bd2
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