[Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

Summary:
This patch implements semantics for the 'arm_sve_vector_bits' type
attribute, defined by the Arm C Language Extensions (ACLE) for SVE [1].
The purpose of this attribute is to define fixed-length (VLST) versions
of existing sizeless types (VLAT).

Implemented in this patch is the the behaviour described in section 3.7.3.2
and minimal parts of sections 3.7.3.3 and 3.7.3.4, this includes:

    * Defining VLST globals, structs, unions, and local variables
    * Implicit casting between VLAT <=> VLST.
    * Diagnosis of ill-formed conditional expressions of the form:

        C ?  E1 : E2

      where E1 is a VLAT type and E2 is a VLST, or vice-versa. This
      avoids any ambiguity about the nature of the result type (i.e is
      it sized or sizeless).
    * For vectors:
        * sizeof(VLST) == N/8
        * alignof(VLST) == 16
    * For predicates:
        * sizeof(VLST) == N/64
        * alignof(VLST) == 2

VLSTs have the same repre...