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Unverified Commit 76508dce authored by Abhinav Garg's avatar Abhinav Garg Committed by GitHub
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[AMDGPU] Fix mode register pass for constrained FP operations (#90085) 

This PR will fix the si-mode-register pass which is inserting an extra
setreg instruction in case of constrained FP operations. This pass will
be ignored for strictfp functions.
parent fc398a11
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