[RISCV] Add codegen support for RISCV XVentanaCondOps Extension

This patch adds codegen support for part of XVentanaCondOps extension.
This extension is designed to reduce the number of branches in
the generated RISCV assembly by replacing branches with conditional
move instructions as defined by XVentanaCondOps specification.

The specification for XVentanaCondOps extension can be found at:
https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.1/ventana-custom-extensions-v1.0.1.pdf



Co-authored-by: Mikhail Gudim <mgudim@ventanamicro.com>

Differential Revision: https://reviews.llvm.org/D139394