Unverified Commit 65b0cc61 authored by Craig Topper's avatar Craig Topper Committed by GitHub
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[RISCV] Add FeatureStdExtI to all CPUs in RISCVProcessors.td. NFC (#88805)

This is currently being implied in RISCVISAInfo.cpp. Make it explicit.

I'm planning to move all extension information to RISCVFeatures.td and
have tablegen create the tables for RISCVISAInfo.cpp. This requires
making the creation of RISCVTargetParserDef.inc in tablegen independent
of RISCVISAInfo.cpp. So we need an accurate extension list for CPUs in
tablegen.
parent fe48bf67
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