Skip to content
GitLab
Commit 5c3c176c authored by Haohai Wen's avatar Haohai Wen
Browse files

Revert "[X86] Revise Alderlake P-Core schedule model" 

This reverts commit 3083b65c.
Since latency from intel doc doesn't reflect worst case.
parent c1ecd0a3
Expand all Hide whitespace changes
Inline Side-by-side
Supports Markdown
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment