[RISCV] Slightly weaken expanded seq_cst atomic op to match reference mapping in in the spec
Table A.6 in the RISC-V ISA Manual indicates that sequentially
consistent atomic ops that have a matching instruction should be mapped
to `amo<op>.{w|d}.aqrl`. But sequentially consistent operations that are
mapped to lr/sc should produce `loop: lr.{w|d}.aqrl; <op>; sc.{w|d}.rl;
bnez loop`. Previously, LLVM produced an `sc.{w|d}.aqrl` which was
stronger than necessary. This patch adjusts the relevant logic so that a
`sc.{w|d}.rl` is produced.
Differential Revision: https://reviews.llvm.org/D146933
parent
d03d98b7
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