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Commit 595a0884 authored by Mateja Marjanovic's avatar Mateja Marjanovic
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[AMDGPU] Add support for new LLVM vector types 

Add VReg, AReg and SReg on AMDGPU for bit widths: 288, 320, 352 and 384.

Differential Revision: https://reviews.llvm.org/D138205
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