[RISCV] Improve SiFive7 for reductions and ordered reductions

Since the scheduling resources for reductions and ordered reductions now
account for LMUL and SEW, we can modify the Latency and ResourceCycles
for these resoruces.

* Most reductions take a total of approx `vl*SEW/DLEN + 5*(4 + log2(DLEN/SEW))`
  cycles.
* Ordered floating-point reductions take a total of approx `5*vl` cycles.

This commit re-commits 208fc34c. It was
failing because it used wrong version of SchedSEWSet.

Differential Revision: https://reviews.llvm.org/D153474